| /linux/drivers/mtd/chips/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
[all …]
|
| /linux/Documentation/devicetree/bindings/display/xlnx/ |
| H A D | xlnx,zynqmp-dpsub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
[all …]
|
| /linux/drivers/staging/axis-fifo/ |
| H A D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
[all …]
|
| H A D | axis-fifo.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx AXIS FIFO: interface to the Xilinx AXI-Stream FIFO IP core
12 /* ----------------------------
14 * ----------------------------
38 /* ----------------------------
40 * ----------------------------
49 /* ----------------------------
51 * ----------------------------
70 /* ----------------------------
72 * ----------------------------
[all …]
|
| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | aspeed,ast2600-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2600-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Billy Tsai <billy_tsai@aspeedtech.com>
13 • 10-bits resolution for 16 voltage channels.
16 • Channel scanning can be non-continuous.
17 • Programmable ADC clock frequency.
18 • Programmable upper and lower threshold for each channels.
21 • Built-in a compensating method.
[all …]
|
| /linux/arch/m68k/q40/ |
| H A D | README | 6 available from this place or http://ftp.uni-erlangen.de/pub/unix/Linux/680x0/q40/
13 is not implemented - do not try it! (See below)
15 For a list of kernel command-line options read the documentation for the
22 poll the floppy for this reason - something that can't be done in Linux.
28 serial.c # normal PC driver - any speed
56 requested - SRAM must start with '%LX$' signature to do this. '-d' option
61 only the penguin - and shell prompt if it gets that far..
66 Most problems seem to be caused by fawlty or badly configured io-cards or
76 This is just an overview, see asm-m68k/* for details ask if you have any
79 The Q40 consists of a 68040@40 MHz, 1MB video RAM, up to 32MB RAM, AT-style
[all …]
|
| /linux/drivers/mtd/maps/ |
| H A D | sun_uflash.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sun_uflash.c - Driver for user-programmable flash on
5 * This driver does NOT provide access to the OBP-flash for
6 * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead.
31 #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */
34 MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets");
45 .name = "SUNW,???-????",
54 if (op->resource[1].flags) { in uflash_devinit()
55 /* Non-CFI userflash device-- once I find one we in uflash_devinit()
59 dp, (unsigned long long)op->resource[0].start); in uflash_devinit()
[all …]
|
| /linux/Documentation/hwmon/ |
| H A D | nct6775.rst | 19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
83 * Nuvoton NCT6796D-S/NCT6799D-R
93 Guenter Roeck <linux@roeck-us.net>
96 -----------
120 triggered if the rotation speed has dropped below a programmable limit. On
121 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
130 An alarm is triggered if the voltage has crossed a programmable minimum
138 The mode works for fan1-fan5.
141 ----------------
143 pwm[1-7]
[all …]
|
| H A D | pc87360.rst | 22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
60 PC87366 11 3 3 3-4 0xE9
[all …]
|
| /linux/drivers/usb/gadget/udc/aspeed-vhub/ |
| H A D | vhub.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
18 #define AST_VHUB_EP_ACK_IER 0x10 /* Programmable Endpoint Pool ACK Interrupt Enable Register */
19 #define AST_VHUB_EP_NACK_IER 0x14 /* Programmable Endpoint Pool NACK Interrupt Enable Register */
20 #define AST_VHUB_EP_ACK_ISR 0x18 /* Programmable Endpoint Pool ACK Interrupt Status Register */
21 #define AST_VHUB_EP_NACK_ISR 0x1C /* Programmable Endpoint Pool NACK Interrupt Status Register */
24 #define AST_VHUB_EP_TOGGLE 0x28 /* Programmable Endpoint Pool Data Toggle Value Set */
107 * per-device register definitions *
146 * per-endpoint register definitions *
213 #define AST_VHUB_NUM_GEN_EPs 15 /* Generic non-0 EPs */
233 /* A transfer request, either core-originated or internal */
[all …]
|
| /linux/drivers/nvmem/ |
| H A D | stm32-romem.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
18 #include "stm32-bsec-optee-ta.h"
20 /* BSEC secure service access from non-secure */
51 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
63 return -EIO; in stm32_bsec_smc()
70 return -ENXIO; in stm32_bsec_smc()
[all …]
|
| /linux/Documentation/misc-devices/ |
| H A D | xilinx_sdfec.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
4 Xilinx SD-FEC Driver
10 This driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.
15 …f SD-FEC core features, see the `SD-FEC Product Guide (PG256) <https://www.xilinx.com/cgi-bin/docs…
19 - Retrieval of the Integrated Block configuration and status information
20 - Configuration of LDPC codes
21 - Configuration of Turbo decoding
22 - Monitoring errors
24 Missing features, known issues, and limitations of the SD-FEC driver are as
27 - Only allows a single open file handler to any instance of the driver at any time
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | pipeline.json | 8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",
128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
146 "BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).",
150 "PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).",
173 "BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
177 "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired.",
204 "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
212 "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counter
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/icelake/ |
| H A D | pipeline.json | 8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",
128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
146 "BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).",
150 "PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).",
173 "BriefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
177 "PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that counts mispredicted return instructions retired.",
204 "PublicDescription": "This event distributes Core crystal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread becomes inactive when it executes the HLT or MWAIT instructions. If one thread is active in a core, all counts are attributed to this hyperthread. To obtain the full count when the Core is active, sum the counts from each hyperthread.",
212 "PublicDescription": "Counts the number of reference cycles when the core is not in a halt state. The core enters the halt state when it is running the HLT instruction or the MWAIT instruction. This event is not affected by core frequency changes (for example, P states, TM2 transitions) but has the same incrementing frequency as the time stamp counter. This event can approximate elapsed time while the core was not in a halt state. This event has a constant ratio with the CPU_CLK_UNHALTED.REF_XCLK event. It is counted on a dedicated fixed counter, leaving the eight programmable counter
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/tigerlake/ |
| H A D | pipeline.json | 8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
146 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
150 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
173 …iefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
177 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
204 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
212 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
229 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
374 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | pipeline.json | 8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
128 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
146 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
150 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
173 …iefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
177 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
204 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
212 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
229 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
355 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | pipeline.json | 8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
146 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
155 …"BriefDescription": "Mispredicted non-taken conditional branch instructions retired. This precise …
159 …"PublicDescription": "Mispredicted non-taken conditional branch instructions retired. This precise…
188 …"BriefDescription": "Miss-predicted near indirect branch instructions retired (excluding returns)",
192 …"PublicDescription": "Counts miss-predicted near indirect branch instructions retired excluding re…
248 …iefDescription": "This event counts the number of mispredicted ret instructions retired. Non PEBS",
252 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
269 …"BriefDescription": "Core clocks when the thread is in the C0.1 light-weight slower wakeup time bu…
273 …"PublicDescription": "Counts core clocks when the thread is in the C0.1 light-weight slower wakeup…
[all …]
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | ti,cdce925.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI CDCE913/925/937/949 programmable I2C clock synthesizers
10 - Alexander Stein <alexander.stein@ew.tq-group.com>
15 - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913
16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925
17 - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937
18 - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949
23 - ti,cdce913
[all …]
|
| /linux/arch/arm/mach-omap2/ |
| H A D | clockdomains2xxx_3xxx_data.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2008-2011 Texas Instruments, Inc.
6 * Copyright (C) 2008-2010 Nokia Corporation
16 * software-controllable dependencies. Non-software-controllable
19 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
21 * The overly-specific dep_bit names are due to a bit name collision
27 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
31 * To-Do List
32 * -> Port the Sleep/Wakeup dependencies for the domains
42 #include "cm-regbits-24xx.h"
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/westmereex/ |
| H A D | pipeline.json | 126 "BriefDescription": "Indirect non call branches executed",
142 "BriefDescription": "All non call branches executed",
217 "BriefDescription": "Mispredicted non call branches executed",
233 "BriefDescription": "Mispredicted indirect non call branches executed",
249 "BriefDescription": "Mispredicted non call branches executed",
306 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
320 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
406 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
446 "BriefDescription": "Retired floating-point operations (Precise Event)",
506 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
| H A D | pipeline.json | 126 "BriefDescription": "Indirect non call branches executed",
142 "BriefDescription": "All non call branches executed",
217 "BriefDescription": "Mispredicted non call branches executed",
233 "BriefDescription": "Mispredicted indirect non call branches executed",
249 "BriefDescription": "Mispredicted non call branches executed",
306 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
320 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
406 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
446 "BriefDescription": "Retired floating-point operations (Precise Event)",
506 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/nehalemep/ |
| H A D | pipeline.json | 126 "BriefDescription": "Indirect non call branches executed",
142 "BriefDescription": "All non call branches executed",
217 "BriefDescription": "Mispredicted non call branches executed",
233 "BriefDescription": "Mispredicted indirect non call branches executed",
249 "BriefDescription": "Mispredicted non call branches executed",
288 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
302 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
388 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
428 "BriefDescription": "Retired floating-point operations (Precise Event)",
488 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/nehalemex/ |
| H A D | pipeline.json | 126 "BriefDescription": "Indirect non call branches executed",
142 "BriefDescription": "All non call branches executed",
217 "BriefDescription": "Mispredicted non call branches executed",
233 "BriefDescription": "Mispredicted indirect non call branches executed",
249 "BriefDescription": "Mispredicted non call branches executed",
288 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
302 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
388 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
428 "BriefDescription": "Retired floating-point operations (Precise Event)",
488 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
| H A D | pipeline.json | 126 "BriefDescription": "Indirect non call branches executed",
142 "BriefDescription": "All non call branches executed",
217 "BriefDescription": "Mispredicted non call branches executed",
233 "BriefDescription": "Mispredicted indirect non call branches executed",
249 "BriefDescription": "Mispredicted non call branches executed",
306 …ription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)",
320 "BriefDescription": "Cycles when thread is not halted (programmable counter)",
406 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)",
446 "BriefDescription": "Retired floating-point operations (Precise Event)",
506 "BriefDescription": "Self-Modifying Code detected",
[all …]
|
| /linux/drivers/mtd/devices/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Self-contained MTD device drivers"
12 These devices come in memory configurations from 32M - 1G. If you
41 tristate "DEC MS02-NV NVRAM module support"
44 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
45 backed-up NVRAM module. The module was originally meant as an NFS
52 The module will be called ms02-nv.
59 Sometimes DataFlash chips are packaged inside MMC-format
77 one-time-programmable (OTP) data. The first half may be written
80 unique-to-each-chip bit pattern at the factory.
[all …]
|