Home
last modified time | relevance | path

Searched +full:non +full:- +full:inclusive (Results 1 – 25 of 174) sorted by relevance

1234567

/linux/arch/parisc/math-emu/
H A Dhppa.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
10 PA header file -- do not include this header file for non-PA builds.
14 /* amount is assumed to be a constant between 0 and 32 (non-inclusive) */
17 dest = ((left) << (32-(amount))) | ((unsigned int)(right) >> (amount))
23 else dest = ((((unsigned) left)&0x7fffffff) << (32-(amount))) | \
26 /* amount must be between 0 and 32 (non-inclusive) */
29 dest = (left << (32-(amount))) | ((unsigned) right >> (amount))
/linux/tools/perf/util/
H A Dblock-range.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 * struct block_range - non-overlapping parts of basic blocks
14 * @start: inclusive start of range
15 * @end: inclusive end of range
40 struct rb_node *n = rb_next(&br->node); in block_range__next()
53 return iter->start; in block_range_iter()
58 if (iter->start == iter->end) in block_range_iter__next()
61 iter->start = block_range__next(iter->start); in block_range_iter__next()
67 if (!iter->start || !iter->end) in block_range_iter__valid()
/linux/Documentation/networking/device_drivers/ethernet/altera/
H A Daltera_tse.rst1 .. SPDX-License-Identifier: GPL-2.0
6 Altera Triple-Speed Ethernet MAC driver
9 Copyright |copy| 2008-2014 Altera Corporation
11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
24 The Triple-Speed Ethernet, SGDMA, and MSGDMA components are all soft IP
31 Triple-Speed Ethernet instance is using an SGDMA or MSGDMA component. The
36 The SGDMA component is to be deprecated in the near future (over the next 1-2
46 Scatter-gather DMA is not supported by the SGDMA or MSGDMA at this time.
47 Scatter-gather DMA will be added to a future maintenance update to this
60 Device Drivers ---> Network device support ---> Ethernet driver support --->
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-firmware-memmap10 However, on most architectures that firmware-provided memory
16 kexec needs the raw firmware-provided memory map to setup the
40 end The end address, inclusive (regardless whether the
41 firmware provides inclusive or exclusive ranges).
56 - System RAM
57 - ACPI Tables
58 - ACPI Non-volatile Storage
59 - Unusable memory
60 - Persistent Memory (legacy)
61 - Persistent Memory
[all …]
/linux/arch/riscv/lib/
H A Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0-only */
12 * a0 - dest
15 * a0 - Inclusive first byte of dest
16 * a1 - Inclusive first byte of src
17 * a2 - Length of copy n
22 * Note: This currently only works on little-endian.
23 * To port to big-endian, reverse the direction of shifts
33 * Forward Copy: a1 - Index counter of src
34 * Reverse Copy: a4 - Index counter of src
35 * Forward Copy: t3 - Index counter of dest
[all …]
/linux/arch/arm64/include/asm/
H A Dcacheflush.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1999-2002 Russell King.
26 * Start addresses are inclusive and end addresses are exclusive; start
29 * See Documentation/core-api/cachetlb.rst for more information. Please note that
30 * the implementation assumes non-aliasing VIPT D-cache and (aliasing)
31 * VIPT I-cache.
34 * - start - virtual start address (inclusive)
35 * - end - virtual end address (exclusive)
39 * Ensure coherency between the I-cache and the D-cache region to
44 * Ensure coherency between the I-cache and the D-cache region to
[all …]
/linux/arch/arm/mm/
H A Dproc-feroceon.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mm/proc-feroceon.S: MMU functions for Feroceon
5 * Heavily based on proc-arm926.S
15 #include <asm/pgtable-hwdef.h>
18 #include "proc-macros.S"
53 movne r3, #((4 - 1) << 30) @ 4-way
55 moveq r3, #0 @ 1-way
175 * - start - start address (inclusive)
176 * - end - end address (exclusive)
177 * - flags - vm_flags describing address space
[all …]
H A Dcache-v4wt.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-v4wt.S
5 * Copyright (C) 1997-2002 Russell king
16 #include "proc-macros.S"
82 * - start - start address (inclusive, page aligned)
83 * - end - end address (exclusive, page aligned)
84 * - flags - vma_area_struct flags describing address space
104 * region described by start. If you have non-snooping
107 * - start - virtual start address
108 * - end - virtual end address
[all …]
H A Dcache-v4wb.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-v4wb.S
5 * Copyright (C) 1997-2002 Russell king
12 #include "proc-macros.S"
39 * 32768 150 149 150 214 216 212 <---
42 * Whole 132 136 132 221 217 207 <---
89 add r2, r2, #FLUSH_BASE_MINICACHE - FLUSH_BASE
105 * - start - start address (inclusive, page aligned)
106 * - end - end address (exclusive, page aligned)
107 * - flags - vma_area_struct flags describing address space
[all …]
H A Dcache-fa.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-fa.S
6 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
8 * Based on cache-v4wb.S:
9 * Copyright (C) 1997-2002 Russell king
19 #include "proc-macros.S"
81 * - start - start address (inclusive, page aligned)
82 * - end - end address (exclusive, page aligned)
83 * - flags - vma_area_struct flags describing address space
108 * region described by start. If you have non-snooping
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_range_fence.h1 /* SPDX-License-Identifier: MIT */
9 #include <linux/dma-fence.h>
16 /** struct xe_range_fence_ops - XE range fence ops */
22 /** struct xe_range_fence - XE range fence (address conflict tracking) */
28 /** @last: last address (inclusive) of range fence is interval tree */
42 /** @link: used to defer free of range fence to non-irq context */
48 /** struct xe_range_fence_tree - interval tree to store range fences */
/linux/arch/powerpc/include/asm/
H A Dkgdb.h52 /* On non-E500 family PPC32 we determine the size by picking the last
62 /* CR/LR, R1, R2, R13-R31 inclusive. */
/linux/arch/arm/include/asm/
H A Dcacheflush.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1999-2002 Russell King
12 #include <asm/glue-cache.h>
17 #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
29 * The arch/arm/mm/cache-*.S and arch/arm/mm/proc-*.S files
32 * Start addresses are inclusive and end addresses are exclusive;
35 * See Documentation/core-api/cachetlb.rst for more information.
37 * effects are cache-type (VIVT/VIPT/PIPT) specific.
42 * Currently only needed for cache-v6.S and cache-v7.S, see
52 * inner shareable and invalidate the I-cache.
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dsamsung,midas-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung,midas-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - $ref: sound-card-common.yaml#
17 const: samsung,midas-audio
23 sound-dai:
27 - sound-dai
33 sound-dai:
[all …]
/linux/mm/
H A Dfilemap.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 1994-1999 Linus Torvalds
30 #include <linux/error-injection.h>
33 #include <linux/backing-dev.h>
73 * finished 'unifying' the page and buffer cache and SMP-threaded the
74 * page-cache, 21.05.1999, Ingo Molnar <mingo@redhat.com>
76 * SMP-threaded pagemap-LRU 1999, Andrea Arcangeli <andrea@suse.de>
82 * ->i_mmap_rwsem (truncate_pagecache)
83 * ->private_lock (__free_pte->block_dirty_folio)
84 * ->swap_lock (exclusive_swap_page, others)
[all …]
H A Dtruncate.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mm/truncate.c - code for taking down pages from address_spaces
12 #include <linux/backing-dev.h>
29 XA_STATE(xas, &mapping->i_pages, start); in clear_shadow_entries()
38 spin_lock(&mapping->host->i_lock); in clear_shadow_entries()
49 inode_add_lru(mapping->hos in clear_shadow_entries()
[all...]
/linux/arch/powerpc/boot/
H A Ddiv64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Divide a 64-bit unsigned number by a 32-bit unsigned number.
5 * non-zero to start with.
7 * the 64-bit quotient, and r4 contains the divisor.
30 li r10,-1 # to make it < 2^32, and shifting
48 divwu r0,r6,r4 # perform the remaining 32-bit division
60 * Updated to be valid for shift counts from 0 to 63 inclusive.
61 * -- Gabriel
75 addi r7,r5,32 # could be xori, or addi with -32
76 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
[all …]
/linux/kernel/irq/
H A Dmsi.c1 // SPDX-License-Identifier: GPL-2.0
9 * PCI compatible and non PCI compatible devices.
26 * struct msi_device_data - MSI per device data
40 * struct msi_ctrl - MSI internal management control structure
45 * than the range due to PCI/multi-MSI.
55 #define MSI_XA_MAX_INDEX (ULONG_MAX - 1)
66 * msi_alloc_desc - Allocate an initialized msi_desc
84 desc->dev = dev; in msi_alloc_desc()
85 desc->nvec_used = nvec; in msi_alloc_desc()
87 desc->affinity = kmemdup_array(affinity, nvec, sizeof(*desc->affinity), GFP_KERNEL); in msi_alloc_desc()
[all …]
/linux/include/linux/
H A Dnetfilter.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 return -(verdict >> NF_VERDICT_QBITS); in NF_DROP_GETERR()
44 return a1->all[0] == a2->all[0] && in nf_inet_addr_cmp()
45 a1->all[1] == a2->all[1] && in nf_inet_addr_cmp()
46 a1->all[2] == a2->all[2] && in nf_inet_addr_cmp()
47 a1->all[3] == a2->all[3]; in nf_inet_addr_cmp()
63 result->all[0] = a1->all[0] & mask->all[0]; in nf_inet_addr_mask()
64 result->all[1] = a1->all[1] & mask->all[1]; in nf_inet_addr_mask()
65 result->all[2] = a1->all[2] & mask->all[2]; in nf_inet_addr_mask()
66 result->all[3] = a1->all[3] & mask->all[3]; in nf_inet_addr_mask()
[all …]
H A Dethtool.h1 /* SPDX-License-Identifier: GPL-2.0 */
50 * enum ethtool_phys_id_state - indicator state for physical identification
66 ETH_RSS_HASH_TOP_BIT, /* Configurable RSS hash function - Toeplitz */
67 ETH_RSS_HASH_XOR_BIT, /* Configurable RSS hash function - Xor */
68 ETH_RSS_HASH_CRC32_BIT, /* Configurable RSS hash function - Crc32 */
78 * struct kernel_ethtool_ringparam - RX/TX ring configuration
103 * enum ethtool_supported_ring_param - indicator caps for setting ring params
110 * @ETHTOOL_RING_USE_HDS_THRS: capture for setting header-data-split-thresh
151 * In a simpler world it should be equal to netdev->carrier_down_count
153 * actually take the physical link down, not to mention NC-SI which,
[all …]
H A Dmsi.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * - Interrupt core code
9 * - PCI/MSI core code
10 * - MSI interrupt domain implementations
11 * - IOMMU, low level VFIO, NTB and other justified exceptions
52 * msi_msg - Representation of a MSI message
94 * pci_msi_desc - PCI/MSI specific MSI descriptor data
97 * @msix_ctrl: [PCI MSI-X] MSI-X cached per vector control bits
98 * @is_msix: [PCI MSI/X] True if MSI-X
103 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
[all …]
/linux/Documentation/userspace-api/
H A Ddma-buf-alloc-exchange.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. Copyright 2021-2023 Collabora Ltd.
9 support for sharing pixel-buffer allocations between processes, devices, and
12 approach this sharing for two-dimensional image data.
25 Conceptually a two-dimensional array of pixels. The pixels may be stored
30 A span along a single y-axis value, e.g. from co-ordinates (0,100) to
37 A span along a single x-axis value, e.g. from co-ordinates (100,0) to
46 A two-dimensional array of some or all of an image's color and alpha
80 A value that denotes the relationship between pixel-location co-ordinates
81 and byte-offset values. Typically used as the byte offset between two
[all …]
/linux/include/xen/interface/io/
H A Dblkif.h1 /* SPDX-License-Identifier: MIT */
5 * Unified block-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
17 * Front->back notifications: When enqueuing a new request, sending a
19 * hold-off mechanism provided by the ring macros). Backends must set
22 * Back->front notifications: When enqueuing a new response, sending a
24 * hold-off mechanism provided by the ring macros). Frontends must set
33 * If supported, the backend will write the key "multi-queue-max-queues" to
37 * key "multi-queue-num-queues" with the number they wish to use, which must be
39 * "multi-queue-max-queues".
[all …]
/linux/Documentation/admin-guide/pm/
H A Dcpufreq.rst1 .. SPDX-License-Identifier: GPL-2.0
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
38 put into different P-states.
41 capacity, so as to decide which P-states to put the CPUs into. Of course, since
64 information on the available P-states (or P-state ranges in some cases) and
65 access platform-specific hardware interfaces to change CPU P-states as requested
70 performance scaling algorithms for P-state selection can be represented in a
[all …]
/linux/fs/nilfs2/
H A Dmdt.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2005-2008 Nippon Telegraph and Telephone Corporation.
14 #include <linux/backing-dev.h>
26 #define NILFS_MDT_MAX_RA_BLOCKS (16 - 1)
36 struct folio *folio = bh->b_folio; in nilfs_mdt_insert_new_block()
43 bh->b_blocknr = 0; in nilfs_mdt_insert_new_block()
45 ret = nilfs_bmap_insert(ii->i_bmap, block, (unsigned long)bh); in nilfs_mdt_insert_new_block()
52 from = kmap_local_folio(folio, offset_in_folio(folio, bh->b_data)); in nilfs_mdt_insert_new_block()
53 memset(from, 0, bh->b_size); in nilfs_mdt_insert_new_block()
64 trace_nilfs2_mdt_insert_new_block(inode, inode->i_ino, block); in nilfs_mdt_insert_new_block()
[all …]

1234567