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/linux/arch/x86/platform/uv/
H A Duv_nmi.c3 * SGI NMI support routines
16 #include <linux/nmi.h>
27 #include <asm/nmi.h>
35 * UV handler for NMI
37 * Handle system-wide NMI events generated by the global 'power nmi' command.
39 * Basic operation is to field the NMI interrupt on each CPU and wait
40 * until all CPU's have arrived into the nmi handler. If some CPU's do not
41 * make it into the handler, try and force them in with the IPI(NMI) signal.
47 * To do this we register our primary NMI notifier on the NMI_UNKNOWN
48 * chain. This reduces the number of false NMI calls when the perf
[all …]
/linux/Documentation/RCU/
H A DNMI-RCU.rst3 Using RCU to Protect Dynamic NMI Handlers
10 how to do this, drawing loosely from Zwane Mwaikambo's NMI-timer
21 The dummy_nmi_callback() function is a "dummy" NMI handler that does
23 the NMI handler to take the default machine-specific action::
28 NMI handler::
45 The do_nmi() function processes each NMI. It first disables preemption
47 count of NMIs. It then invokes the NMI handler stored in the nmi_callback
49 default_do_nmi() function to handle a machine-specific NMI. Finally,
63 Back to the discussion of NMI and RCU::
70 The set_nmi_callback() function registers an NMI handler. Note that any
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/linux/arch/sparc/kernel/
H A Dnmi.c2 /* Pseudo NMI support on sparc64 systems.
6 * The NMI watchdog support and infrastructure is based almost
7 * entirely upon the x86 NMI support code.
13 #include <linux/nmi.h>
29 /* We don't have a real NMI on sparc64, but we can fake one
40 * >0: the NMI watchdog is active, but can be disabled
41 * <0: the NMI watchdog has not been set up, and cannot be enabled
42 * 0: the NMI watchdog is disabled, but can be enabled
100 if (notify_die(DIE_NMI, "nmi", regs, 0, in perfctr_irq()
114 die_nmi("BUG: NMI Watchdog detected LOCKUP", in perfctr_irq()
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/linux/arch/x86/entry/
H A Dentry_64.S945 * only on return from non-NMI IST interrupts that came
1111 * the iretq it performs will take us out of NMI context.
1113 * NMI is using the top of the stack of the previous NMI. We
1114 * can't let it execute because the nested NMI will corrupt the
1115 * stack of the previous NMI. NMI handlers are not re-entrant
1122 * is an NMI stack.
1123 * If the variable is not set and the stack is not the NMI
1129 * o Continue processing the NMI
1130 * If the variable is set or the previous stack is the NMI stack:
1132 * o return back to the first NMI
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/linux/arch/x86/lib/
H A Dusercopy.c14 * copy_from_user_nmi - NMI safe copy from user
22 * from NMI context. Despite the name it is not restricted to be called
23 * from NMI context. It is safe to be called from any other context as
27 * For NMI context invocations this relies on the nested NMI work to allow
28 * atomic faults from the NMI path; the nested NMI paths are careful to
43 * Even though this function is typically called from NMI/IRQ context in copy_from_user_nmi()
/linux/lib/
H A Dnmi_backtrace.c3 * NMI backtrace support
8 * HW NMI watchdog support
12 * Arch specific calls to support NMI watchdog
14 * Bits copied from original nmi.c file
19 #include <linux/nmi.h>
56 * Don't try to send an NMI to this cpu; it may work on some in nmi_trigger_cpumask_backtrace()
65 pr_info("Sending NMI from CPU %d to CPUs %*pbl:\n", in nmi_trigger_cpumask_backtrace()
101 * Allow nested NMI backtraces while serializing in nmi_cpu_backtrace()
106 pr_warn("NMI backtrace for cpu %d skipped: idling at %pS\n", in nmi_cpu_backtrace()
109 pr_warn("NMI backtrace for cpu %d\n", cpu); in nmi_cpu_backtrace()
H A Dgenalloc.c8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
22 * the allocator can NOT be used in NMI handler. So code uses the
23 * allocator in NMI handler should depend on
274 * Can not be used in NMI handler on architectures without
275 * NMI-safe cmpxchg implementation.
336 * Can not be used in NMI handler on architectures without
337 * NMI-safe cmpxchg implementation.
357 * given pool allocation function. Can not be used in NMI handler on
358 * architectures without NMI-safe cmpxchg implementation.
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/linux/Documentation/watchdog/
H A Dhpwdt.rst2 HPE iLO NMI Watchdog Driver
11 The HPE iLO NMI Watchdog driver is a kernel module that provides basic
12 watchdog functionality and handler for the iLO "Generate NMI to System"
34 NMI is delivered to the system. Setting the value to
35 zero disables the pretimeout NMI.
42 kdumptimeout Minimum timeout in seconds to apply upon receipt of an NMI
53 Due to limitations in the iLO hardware, the NMI pretimeout if enabled,
58 Upon receipt of an NMI from the iLO, the hpwdt driver will initiate a
70 If the hpwdt does not receive the NMI associated with an expiring timer,
76 The HPE iLO NMI Watchdog Driver and documentation were originally developed
/linux/kernel/
H A Dwatchdog_perf.c9 * Some chunks also taken from the old x86-specific nmi watchdog code, thanks
13 #define pr_fmt(fmt) "NMI watchdog: " fmt
16 #include <linux/nmi.h>
38 * So it runs effectively with 2.5 times the rate of the NMI in watchdog_update_hrtimer_threshold()
40 * the NMI watchdog expires. The NMI watchdog on x86 is based on in watchdog_update_hrtimer_threshold()
42 * might run way faster than expected and the NMI fires in a in watchdog_update_hrtimer_threshold()
45 * enough to get the NMI period smaller than the hrtimer watchdog in watchdog_update_hrtimer_threshold()
48 * The sample threshold is used to check in the NMI handler whether in watchdog_update_hrtimer_threshold()
49 * the minimum time between two NMI samples has elapsed. That in watchdog_update_hrtimer_threshold()
262 * watchdog_hardlockup_probe - Probe whether NMI event is available at all
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/linux/include/xen/interface/
H A Dnmi.h3 * nmi.h
5 * NMI callback registration and reason codes.
16 * NMI reason codes:
25 /* Unknown hardware-generated NMI. */
35 * Register NMI callback for this (calling) VCPU. Currently this only makes
47 * Deregister NMI callback for this (calling) VCPU.
/linux/arch/x86/kernel/apic/
H A Dx2apic_savic.c136 static void send_ipi_dest(unsigned int cpu, unsigned int vector, bool nmi) in send_ipi_dest() argument
138 if (nmi) in send_ipi_dest()
144 static void send_ipi_allbut(unsigned int vector, bool nmi) in send_ipi_allbut() argument
155 send_ipi_dest(cpu, vector, nmi); in send_ipi_allbut()
159 static inline void self_ipi(unsigned int vector, bool nmi) in self_ipi() argument
163 if (nmi) in self_ipi()
173 bool nmi; in savic_icr_write() local
177 nmi = ((icr_low & APIC_DM_FIXED_MASK) == APIC_DM_NMI); in savic_icr_write()
181 self_ipi(vector, nmi); in savic_icr_write()
184 self_ipi(vector, nmi); in savic_icr_write()
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H A Dhw_nmi.c3 * HW NMI watchdog support
7 * Arch specific calls to support NMI watchdog
9 * Bits copied from original nmi.c file
14 #include <asm/nmi.h>
20 #include <linux/nmi.h>
/linux/Documentation/trace/
H A Devents-nmi.rst2 NMI Trace Events
7 /sys/kernel/tracing/events/nmi
14 NMI handlers are hogging large amounts of CPU time. The kernel
17 INFO: NMI handler took too long to run: 9.207 msecs
34 cd /sys/kernel/tracing/events/nmi/nmi_handler
H A Dosnoise-tracer.rst21 NMI or in the hardware itself. At the end of the period, hwlatd enables
23 prints a NMI occurrence counter. If the output does not report NMI
25 the latency. The hwlat detects the NMI execution by observing
26 the entry and exit of a NMI.
34 interference. The interference counter for NMI, IRQs, SoftIRQs, and
65 … CPU# |||| TIMESTAMP IN US IN US AVAILABLE IN US HW NMI IRQ SIRQ THREAD
142 - osnoise:nmi_noise: noise from NMI, including the duration.
/linux/arch/sh/boards/mach-sdk7786/
H A Dnmi.c3 * SDK7786 FPGA NMI Support.
21 * Default to the manual NMI switch.
40 pr_warn("Unknown NMI mode %s\n", str); in nmi_mode_setup()
43 printk("Set NMI mode to %d\n", nmi_mode); in nmi_mode_setup()
72 /* Set the NMI source */ in sdk7786_nmi_init()
/linux/drivers/irqchip/
H A Dirq-sunxi-nmi.c2 * Allwinner A20/A31 SoCs NMI IRQ chip driver.
11 #define DRV_NAME "sunxi-nmi"
30 * For deprecated sun6i-a31-sc-nmi compatible.
211 /* Clear any pending NMI interrupts */ in sunxi_sc_nmi_irq_init()
229 IRQCHIP_DECLARE(sun6i_sc_nmi, "allwinner,sun6i-a31-sc-nmi", sun6i_sc_nmi_irq_init);
236 IRQCHIP_DECLARE(sun7i_sc_nmi, "allwinner,sun7i-a20-sc-nmi", sun7i_sc_nmi_irq_init);
243 IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi", sun9i_nmi_irq_init);
250 IRQCHIP_DECLARE(sun55i_nmi, "allwinner,sun55i-a523-nmi", sun55i_nmi_irq_init);
/linux/arch/x86/include/asm/
H A Dsev-internal.h14 * It is needed when an NMI happens while the #VC handler uses the real
15 * GHCB, and the NMI handler itself is causing another #VC exception. In
27 * This is necessary for example in the #VC->NMI->#VC case when the NMI
28 * happens while the first #VC handler uses the GHCB. When the NMI code
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Drenesas,rzg2l-irqc.yaml15 interrupts of NMI, IRQ, and GPIOINT and the interrupts of the built-in peripheral
19 - NMI edge select (NMI is not treated as NMI exception and supports fall edge and
36 description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the
52 - description: NMI interrupt
104 - const: nmi
263 interrupt-names = "nmi",
/linux/arch/x86/platform/intel-mid/
H A Dintel-mid.c79 * Moorestown does not have external NMI source nor port 0x61 to report
80 * NMI status. The possible NMI sources are from pmu as a result of NMI
82 * misled NMI handler.
/linux/arch/mips/sgi-ip27/
H A Dip27-nmi.c10 #include <asm/sn/nmi.h>
59 pr_emerg("NMI nasid %d: slice %d\n", nasid, slice); in nmi_cpu_eframe_save()
164 * Save the nmi cpu registers for all cpus in the system.
188 * Wait up to 15 seconds for the other cpus to respond to the NMI. in nmi_dump()
189 * If a cpu has not responded after 10 sec, send it 1 additional NMI. in nmi_dump()
191 * - sometimes a MMSC fail to NMI all cpus. in nmi_dump()
227 * Save the nmi cpu registers for all cpu in the eframe format. in nmi_dump()
/linux/arch/x86/kernel/cpu/microcode/
H A Dcore.c31 #include <linux/nmi.h>
338 /* If invoked directly, tickle the NMI watchdog */ in wait_for_cpus()
361 /* If invoked directly, tickle the NMI watchdog */ in wait_for_ctrl()
471 /* Enable the rendezvous handler and send NMI */ in kick_offline_cpus()
514 * in the NMI rendezvous to protect against a concurrent NMI on affected
548 * safe against an NMI which is delivered to the secondary SMT sibling
550 * up in #INT3, #DB and #PF. The IRET from those exceptions reenables NMI
551 * which is the opposite of what the NMI rendezvous is trying to achieve.
555 * path which must be NMI safe until the primary thread completed the
570 /* Enable the NMI handler and raise NMI */ in load_cpus_stopped()
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/linux/arch/x86/kernel/
H A Dsmp.c33 #include <asm/nmi.h>
123 /* We are registered on stopping cpu too, avoid spurious NMI */ in smp_stop_nmi_callback()
177 * 3) If #2 timed out send an NMI to the CPUs which did not in native_stop_other_cpus()
186 * other CPU is still handling the NMI. Again, there is no in native_stop_other_cpus()
199 * prevent an NMI shutdown attempt in case that not all in native_stop_other_cpus()
207 /* if the REBOOT_VECTOR didn't work, try with the NMI */ in native_stop_other_cpus()
210 * If NMI IPI is enabled, try to register the stop handler in native_stop_other_cpus()
217 pr_emerg("Shutting down cpus with NMI\n"); in native_stop_other_cpus()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dlantiq,pinctrl-xway.txt57 spi_cs2, spi_cs3, spi_cs4, spi_cs5, spi_cs6, asc0, asc0 cts rts, stp, nmi,
62 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, dfe
69 spi_cs6, asc0, asc0 cts rts, stp, nmi, gpt1, gpt2, gpt3, clkout0, clkout1,
74 spi, asc, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe
84 stp, nmi, gpt1, gpt2, gpt3, clkout0, clkout1, clkout2, clkout3, gnt1,
89 spi, usif, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe, gphy
/linux/arch/mips/include/asm/sn/sn0/
H A Dkldir.h73 * | CPU 1 NMI Eframe area |
75 * | CPU 0 NMI Eframe area |
77 * | CPU 1 NMI Register save area |
79 * | CPU 0 NMI Register save area |
85 * | kernel/io6prom nmi registers |
98 * | NMI Handler (Protected Page) |
112 * | kernel/io6prom nmi registers |
176 * save area of kernel nmi regs in the prom format
181 * save area of kernel nmi regs in eframe format
/linux/Documentation/tools/rtla/
H A Drtla-hwnoise.rst50 …CPU Period Runtime Noise % CPU Aval Max Noise Max Single HW NMI
69 The *HW* and *NMI* columns show the total number of *hardware* and *NMI* noise
82 and disabling the TSC watchdog to remove the NMI (it is possible to identify
89 …CPU Period Runtime Noise % CPU Aval Max Noise Max Single HW NMI

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