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/freebsd/sys/contrib/device-tree/Bindings/net/nfc/
H A Dmarvell,nci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/marvel
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H A Dnfcmrvl.txt1 * Marvell International Ltd. NCI NFC Controller
4 - compatible: Should be:
5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
6 - "marvell,nfc-i2c" for I2C devices
7 - "marvell,nfc-spi" for SPI devices
10 - pinctrl-names: Contains only one value - "default".
11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - reset-n-io: Output GPIO pin used to reset the chip (active low).
13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames.
15 Optional UART-based chip specific properties:
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H A Dpn532.txt1 * NXP Semiconductors PN532 NFC Controller
4 - compatible: Should be
5 - "nxp,pn532" Place a node with this inside the devicetree node of the bus
6 where the NFC chip is connected to.
7 Currently the kernel has phy bindings for uart and i2c.
8 - "nxp,pn532-i2c" (DEPRECATED) only works for the i2c binding.
9 - "nxp,pn533-i2c" (DEPRECATED) only works for the i2c binding.
12 - clock-frequency: I²C work frequency.
13 - reg: for the I²C bus address. This is fixed at 0x24 for the PN532.
14 - interrupts: GPIO interrupt to which the chip is connected
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H A Dnxp,pn532.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/nxp,pn532.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Semiconductors PN532 NFC controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - const: nxp,pn532
16 - description: Deprecated bindings
18 - nxp,pn532-i2c
19 - nxp,pn533-i2c
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H A Dsamsung,s3fwrn5.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/nfc/samsung,s3fwrn5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3FWRN5 NCI NFC Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - samsung,s3fwrn5-i2c
16 - samsung,s3fwrn82
18 en-gpios:
32 wake-gpios:
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dpdm360ng.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2009 - 2010 DENX Software Engineering.
17 #address-cells = <1>;
18 #size-cells = <1>;
19 interrupt-parent = <&ipic>;
26 nfc@40000000 {
27 bank-width = <0x1>;
41 compatible = "amd,s29gl01gp", "cfi-flash";
44 #address-cells = <1>;
45 #size-cells = <1>;
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H A Dmpc5121ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
14 nfc@40000000 {
32 compatible = "cfi-flash";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 bank-width = <4>;
37 device-width = <2>;
42 read-only;
52 device-tree@3ec0000 {
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
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H A Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 interrupt-parent = <&gic>;
37 compatible = "fixed-clock";
38 clock-frequency = <24000000>;
39 #clock-cells = <0>;
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H A Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/rk3128-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3128-power.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
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H A Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-binding
459 nfc: nand-controller@30100000 { global() label
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx35-pdk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
11 compatible = "fsl,imx35-pdk", "fsl,imx35";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_esdhc1>;
27 imx35-pdk {
50 &nfc {
51 nand-bus-width = <16>;
52 nand-ecc-mode = "hw";
53 nand-on-flash-bbt;
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H A Dimx31-lite.dts1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
5 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "logicpd,imx31-lite", "fsl,imx31";
17 stdout-path = &uart1;
26 compatible = "gpio-leds";
42 &nfc {
43 nand-bus-width = <8>;
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H A Dimx6ull-dhcor-maveo-box.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * DHCR-iMX6ULL-C080-R051-SPI-WBT-I-01LG
8 * DHCOR PCB number: 578-200 or newer
9 * maveo box PCB number: 525-200 or newer
12 /dts-v1/;
14 #include "imx6ull-dhcor-som.dtsi"
18 compatible = "marantec,imx6ull-dhcor-maveo-box", "dh,imx6ull-dhcor-som",
28 stdout-path = "serial0:115200n8";
31 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
32 compatible = "regulator-fixed";
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H A Dimx31.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 * pre-existing /chosen node to be available to insert the
34 #address-cells = <1>;
35 #size-cells = <0>;
38 compatible = "arm,arm1136jf-s";
44 avic: interrupt-controller@68000000 {
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H A Dimx27-eukrea-cpuimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
18 clk14745600: clk-uart {
19 compatible = "fixed-clock";
20 #clock-cell
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H A Dimx27-pdk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
10 compatible = "fsl,imx27-pdk", "fsl,imx27";
19 compatible = "usb-nop-xceiv";
21 clock-names = "main_clk";
22 #phy-cells = <0>;
27 pinctrl-name
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H A Dimx35.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include "imx35-pinfunc.h"
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1136jf-s";
48 avic: avic-interrupt-controller@68000000 {
49 compatible = "fsl,imx35-avic", "fsl,avic";
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H A Dimx27.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx27-pinfunc.h"
7 #include <dt-bindings/clock/imx27-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
43 aitc: aitc-interrupt-controller@10040000 {
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-ux500-samsung-codina.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Ace 2 GT-I8160 also known as Codina.
11 * The Samsung tree further talks about GT-I8160P and GT-I8160chn (China).
12 * The GT-I8160 plain is known as the "europe" variant.
13 * The GT-I8160P is the CDMA version and it appears to not use the ST
14 * Microelectronics accelerometer and reportedly has NFC mounte
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H A Dste-ux500-samsung-janice.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctr
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/freebsd/sys/dts/arm/
H A Dimx53x.dtsi34 #address-cells = <1>;
35 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <0>;
50 d-cache-line-size = <32>;
51 i-cache-line-size = <32>;
52 d-cache-size = <0x8000>;
53 i-cache-size = <0x8000>;
54 l2-cache-line-size = <32>;
55 l2-cache-line = <0x40000>;
[all …]
H A Dimx51x.dtsi32 #address-cells = <1>;
33 #size-cells = <1>;
41 #address-cells = <1>;
42 #size-cells = <0>;
48 d-cache-line-size = <32>;
49 i-cache-line-size = <32>;
50 d-cache-size = <0x8000>;
51 i-cache-size = <0x8000>;
53 timebase-frequency = <0>;
54 bus-frequency = <0>;
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Damlogic-c3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/amlogic,c3-reset.h>
10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h>
12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h>
13 #include <dt-bindings/power/amlogic,c3-pwrc.h>
14 #include <dt-bindings/gpio/amlogic-c3-gpio.h>
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