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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmediatek-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek-dwma
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H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
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/freebsd/sys/dev/dc/
H A Dif_dcreg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
58 * There are two general 'types' of MX chips that we need to be
85 (x->dc_type == DC_TYPE_98713 || \
86 x->dc_type == DC_TYPE_98713A || \
87 x->dc_type == DC_TYPE_987x5)
90 (x->dc_type == DC_TYPE_AL981 || \
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/freebsd/sys/dev/igc/
H A Digc_phy.c1 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
13 * igc_init_phy_ops_generic - Initialize PHY function pointers
16 * Setups up the function pointers to no-op functions
20 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_ops_generic() local
24 phy->ops.init_params = igc_null_ops_generic; in igc_init_phy_ops_generic()
25 phy->ops.acquire = igc_null_ops_generic; in igc_init_phy_ops_generic()
26 phy->ops.check_reset_block = igc_null_ops_generic; in igc_init_phy_ops_generic()
27 phy->ops.force_speed_duplex = igc_null_ops_generic; in igc_init_phy_ops_generic()
28 phy->ops.get_info = igc_null_ops_generic; in igc_init_phy_ops_generic()
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/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dtx.c1 // SPDX-License-Identifier: ISC
11 if (!txq->sta) in mt76_txq_get_qid()
14 return txq->ac; in mt76_txq_get_qid()
20 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; in mt76_tx_check_agg_ssn()
25 if (!sta || !ieee80211_is_data_qos(hdr->frame_control) || in mt76_tx_check_agg_ssn()
26 !ieee80211_is_data_present(hdr->frame_control)) in mt76_tx_check_agg_ssn()
29 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; in mt76_tx_check_agg_ssn()
30 txq = sta->txq[tid]; in mt76_tx_check_agg_ssn()
31 mtxq = (struct mt76_txq *)txq->drv_priv; in mt76_tx_check_agg_ssn()
32 if (!mtxq->aggr) in mt76_tx_check_agg_ssn()
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7921/
H A Dmac.c1 // SPDX-License-Identifier: ISC
55 spin_lock_bh(&dev->mt76.sta_poll_lock); in mt7921_mac_sta_poll()
56 list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list); in mt7921_mac_sta_poll()
57 spin_unlock_bh(&dev->mt76.sta_poll_lock); in mt7921_mac_sta_poll()
65 spin_lock_bh(&dev->mt76.sta_poll_lock); in mt7921_mac_sta_poll()
67 spin_unlock_bh(&dev->mt76.sta_poll_lock); in mt7921_mac_sta_poll()
72 list_del_init(&msta->wcid.poll_list); in mt7921_mac_sta_poll()
73 spin_unlock_bh(&dev->mt76.sta_poll_lock); in mt7921_mac_sta_poll()
75 idx = msta->wcid.idx; in mt7921_mac_sta_poll()
78 for (i = 0; i < IEEE80211_NUM_ACS; i++) { in mt7921_mac_sta_poll()
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7915/
H A Dmac.c1 // SPDX-License-Identifier: ISC
16 #define to_rssi(field, rcpi) ((FIELD_GET(field, rcpi) - 220) / 2)
19 .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
33 .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
44 .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
63 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) in mt7915_rx_get_wcid()
66 wcid = rcu_dereference(dev->mt76.wcid[idx]); in mt7915_rx_get_wcid()
70 if (!wcid->sta) in mt7915_rx_get_wcid()
74 if (!sta->vif) in mt7915_rx_get_wcid()
77 return &sta->vif->sta.wcid; in mt7915_rx_get_wcid()
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/freebsd/sys/dev/mii/
H A Dacphy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 /*-
47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
59 * Driver for Altima AC101 10/100 PHY
137 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; in acphy_attach()
140 #define ADD(m) ifmedia_add(&sc->mii_pdata->mii_media, (m), 0, NULL) in acphy_attach()
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/freebsd/sys/i386/acpica/
H A Dacpi_wakeup.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2001-2012 Mitsuru IWASAKI <iwasaki@jp.freebsd.org>
7 * Copyright (c) 2008-2012 Jung-uk Kim <jkim@FreeBSD.org>
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * FOR AN
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
15 /* EC turns on w/ pp900_ap_en; always on for AP */
16 regulator-alway
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/freebsd/sys/arm/freescale/imx/
H A Dimx6_ccm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * Clocks and power control driver for Freescale i.MX6 family of SoCs.
69 return (bus_read_4(sc->mem_res, off)); in RD4()
76 bus_write_4(sc->mem_res, off, val); in WR4()
81 * interface, use the age-old workaround of unconditionally enabling the clocks
82 * for devices we might need to use. The SoC defaults to most clocks enabled,
83 * but the rom boot code and u-boot disable a few of them. We turn on only
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/freebsd/sys/dev/e1000/
H A De1000_82571.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
88 * e1000_init_phy_params_82571 - Init PHY func ptrs.
93 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82571() local
98 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82571()
99 phy->type = e1000_phy_none; in e1000_init_phy_params_82571()
103 phy->addr = 1; in e1000_init_phy_params_82571()
104 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82571()
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H A De1000_82541.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
82 * e1000_init_phy_params_82541 - Init PHY func ptrs.
87 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82541() local
92 phy->addr = 1; in e1000_init_phy_params_82541()
93 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_init_phy_params_82541()
94 phy->reset_delay_us = 10000; in e1000_init_phy_params_82541()
95 phy->type = e1000_phy_igp; in e1000_init_phy_params_82541()
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H A Dif_em.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2001-2024, Intel Corporation
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
40 static const char em_driver_version[] = "7.7.8-fbsd";
41 static const char igb_driver_version[] = "2.5.28-fbsd";
55 /* Intel(R) - lem-class legacy devices */
136 /* Intel(R) - em-class devices */
185 PVID(0x8086, E1000_DEV_ID_ICH8_82567V_3, "Intel(R) 82567V-3 ICH8"),
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/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
7 * Permission to use, copy, modify, and/or distribute this software for any
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
33 (AH_PRIVATE(_ah)->ah_eeversion & AR5416_EEP_VER_MINOR_MASK)
122 HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1); in ar5416Reset()
127 /* XXX Turn on fast channel change for 5416 */ in ar5416Reset()
144 * Don't do this for the AR9285 - it breaks RX for single in ar5416Reset()
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/freebsd/sys/arm64/broadcom/genet/
H A Dif_genet.c1 /*-
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * this driver have been copied from if_awg.c for the Allwinner EMAC,
80 #define RD4(sc, reg) bus_read_4((sc)->res[_RES_MAC], (reg))
81 #define WR4(sc, reg, val) bus_write_4((sc)->res[_RES_MAC], (reg), (val))
83 #define GEN_LOCK(sc) mtx_lock(&(sc)->mtx)
84 #define GEN_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
85 #define GEN_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED)
86 #define GEN_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED)
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_pcie_w_reg.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
376 * - If MSI-X is enabled and auto_clear control bit =TRUE, automatically
377 * cleared after MSI-X message associated with this specific interrupt
378 * bit is sent (MSI-X acknowledge is received).
379 * - Software can set a bit in this register by writing 1 to the
381 * Write-0 clears a bit. Write-1 has no effect.
382 * - On CPU Read - If clear_on_read control bit =TRUE, automatically
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_power.c4 * Permission to use, copy, modify, and/or distribute this software for any
10 * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
30 ahp->ah_mcast_filter_l32_set = 0; in ar9300_wowoffload_prep()
31 ahp->ah_mcast_filter_u32_set = 0; in ar9300_wowoffload_prep()
39 if (ahp->ah_mcast_filter_l32_set != 0) { in ar9300_wowoffload_post()
41 val &= ~ahp->ah_mcast_filter_l32_set; in ar9300_wowoffload_post()
44 if (ahp->ah_mcast_filter_u32_set != 0) { in ar9300_wowoffload_post()
46 val &= ~ahp->ah_mcast_filter_u32_set; in ar9300_wowoffload_post()
50 ahp->ah_mcast_filter_l32_set = 0; in ar9300_wowoffload_post()
51 ahp->ah_mcast_filter_u32_set = 0; in ar9300_wowoffload_post()
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam5729-beagleboneai.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2019 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
9 #include "am57xx-commercial-grade.dtsi"
10 #include "dra74x-mmc-iodelay.dtsi"
11 #include "dra74-ipu-dsp-common.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/dra.h>
18 compatible = "beagle,am5729-beagleboneai", "ti,am5728",
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/freebsd/sys/dev/iwm/
H A Dif_iwmvar.h7 * Permission to use, copy, modify, and distribute this software for any
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
20 /*-
21 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
22 * which were used as the reference documentation for this implementation.
34 * Copyright(c) 2007 - 2013 Intel Corporation. All rights reserved.
42 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
43 * General Public License for more details.
55 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
60 * Copyright(c) 2005 - 201
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Dmac.c1 // SPDX-License-Identifier: ISC
17 #define to_rssi(field, rcpi) ((FIELD_GET(field, rcpi) - 220) / 2)
20 .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
34 .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
45 .pulse_th = { 110, -10, -80, 40, 5200, 128, 5200 },
64 if (idx >= ARRAY_SIZE(dev->mt76.wcid)) in mt7996_rx_get_wcid()
67 wcid = rcu_dereference(dev->mt76.wcid[idx]); in mt7996_rx_get_wcid()
71 if (!wcid->sta) in mt7996_rx_get_wcid()
75 if (!sta->vif) in mt7996_rx_get_wcid()
78 return &sta->vif->sta.wcid; in mt7996_rx_get_wcid()
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/freebsd/sys/dev/ixgbe/
H A Dif_ix.c3 Copyright (c) 2001-2017, Intel Corporation
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
48 static const char ixgbe_driver_version[] = "4.0.1-k";
93 "Intel(R) X520-T 82599 LOM"),
105 "Intel(R) X520-1 82599EN (SFP+)"),
107 "Intel(R) X520-4 82599 (Quad SFP+)"),
109 "Intel(R) X520-Q1 82599 (QSFP+)"),
111 "Intel(R) X540-AT2"),
112 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"),
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/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A Dfw.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 #include "iwl-tran
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