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/linux/Documentation/devicetree/bindings/display/panel/
H A Ddisplay-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/display-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
12 - Sam Ravnborg <sam@ravnborg.org>
17 The display-timings node makes it possible to specify the timings
18 and to specify the timing that is native for the display.
22 const: display-timings
[all …]
/linux/drivers/misc/cxl/
H A Dnative.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <misc/cxl-base.h>
29 spin_lock(&afu->afu_cntl_lock); in afu_control()
40 dev_warn(&afu->dev, "WARNING: AFU control timed out!\n"); in afu_control()
41 rc = -EBUSY; in afu_control()
45 if (!cxl_ops->link_ok(afu->adapter, afu)) { in afu_control()
46 afu->enabled = enabled; in afu_control()
47 rc = -EIO; in afu_control()
67 afu->enabled = enabled; in afu_control()
70 spin_unlock(&afu->afu_cntl_lock); in afu_control()
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H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <asm/pnv-pci.h>
89 #define AFUD_READ(afu, off) in_be64(afu->native->afu_desc_mmio + off)
90 #define AFUD_READ_LE(afu, off) in_le64(afu->native->afu_desc_mmio + off)
161 dev_info(&dev->dev, "dump_cxl_config_space\n"); in dump_cxl_config_space()
164 dev_info(&dev->dev, "BAR0: %#.8x\n", val); in dump_cxl_config_space()
166 dev_info(&dev->dev, "BAR1: %#.8x\n", val); in dump_cxl_config_space()
168 dev_info(&dev->dev, "BAR2: %#.8x\n", val); in dump_cxl_config_space()
170 dev_info(&dev->dev, "BAR3: %#.8x\n", val); in dump_cxl_config_space()
172 dev_info(&dev->dev, "BAR4: %#.8x\n", val); in dump_cxl_config_space()
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H A Ddebugfs.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 static void debugfs_create_io_x64(const char *name, umode_t mode, in debugfs_create_io_x64() argument
32 debugfs_create_file_unsafe(name, mode, parent, (void __force *)value, in debugfs_create_io_x64()
45 debugfs_create_io_x64("xsl-debug", 0600, dir, in cxl_debugfs_add_adapter_regs_psl9()
65 snprintf(buf, 32, "card%i", adapter->adapter_num); in cxl_debugfs_adapter_add()
67 adapter->debugfs = dir; in cxl_debugfs_adapter_add()
71 if (adapter->native->sl_ops->debugfs_add_adapter_regs) in cxl_debugfs_adapter_add()
72 adapter->native->sl_ops->debugfs_add_adapter_regs(adapter, dir); in cxl_debugfs_adapter_add()
77 debugfs_remove_recursive(adapter->debugfs); in cxl_debugfs_adapter_remove()
101 if (!afu->adapter->debugfs) in cxl_debugfs_afu_add()
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/linux/Documentation/input/devices/
H A Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
24 5.2 Native absolute mode 6 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
30 6.2 Native absolute mode 6 byte packet format
35 7.2 Native absolute mode 6 byte packet format
41 8.2 Native relative mode 6 byte packet format
82 in relative mode and not in absolute mode. As the Linux Elantech touchpad
83 driver always puts the hardware into absolute mode not all information
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/linux/Documentation/devicetree/bindings/
H A Dcommon-properties.txt5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
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/linux/drivers/gpu/drm/i915/gt/uc/abi/
H A Dguc_klvs_abi.h1 /* SPDX-License-Identifier: MIT */
14 * +---+-------+--------------------------------------------------------------+
17 * | 0 | 31:16 | **KEY** - KLV key identifier |
18 * | | | - `GuC Self Config KLVs`_ |
20 * | +-------+--------------------------------------------------------------+
21 * | | 15:0 | **LEN** - length of VALUE (in 32bit dwords) |
22 * +---+-------+--------------------------------------------------------------+
23 * | 1 | 31:0 | **VALUE** - actual value of the KLV (format depends on KEY) |
24 * +---+-------+ |
26 * +---+-------+ |
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/linux/include/drm/display/
H A Ddrm_dsc.h1 /* SPDX-License-Identifier: MIT
45 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
67 * struct drm_dsc_config - Parameters required to configure DSC
84 * Flag to indicate if RGB - YCoCg conversion is needed
101 * @simple_422: True if simple 4_2_2 mode is enabled else False
173 u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
221 * @vbr_enable: True if VBR mode is enabled, false if disabled
225 * @mux_word_size: Mux word size (in bits) for SSM mode
247 * @native_422: True if Native 4:2:2 supported, else false
251 * @native_420: True if Native 4:2:0 supported else false.
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/linux/drivers/ps3/
H A Dps3av.c1 // SPDX-License-Identifier: GPL-2.0-only
156 if (hdr->cid & PS3AV_EVENT_CMD_MASK) { in ps3av_parse_event_packet()
157 table = ps3av_search_cmd_table(hdr->cid, PS3AV_EVENT_CMD_MASK); in ps3av_parse_event_packet()
159 dev_dbg(&ps3av->dev->core, in ps3av_parse_event_packet()
161 hdr->cid, ps3av_event_get_port_id(hdr->cid), in ps3av_parse_event_packet()
162 hdr->size); in ps3av_parse_event_packet()
166 __func__, hdr->cid, hdr->size); in ps3av_parse_event_packet()
179 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); in ps3av_vuart_write()
181 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__); in ps3av_vuart_write()
191 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); in ps3av_vuart_read()
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/linux/tools/testing/selftests/powerpc/tm/
H A Dtm-trap.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * to zero which determines a BE endianness that is the native
27 * endianness "flipped back" to the native endianness (BE).
67 thread_endianness = MSR_LE & ucp->uc_mcontext.gp_regs[PT_MSR]; in trap_signal_handler()
70 * Little-Endian Machine in trap_signal_handler()
94 * not in transacional mode). On te other hand, if after in trap_signal_handler()
95 * the return from the signal handler the endianness in- in trap_signal_handler()
98 * and (4) are executed (tbegin.; trap;) and we get sim- in trap_signal_handler()
99 * ilaly on the trap signal handler, but now in TM mode. in trap_signal_handler()
104 * Finally, getting a trap in TM mode or not is just in trap_signal_handler()
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/linux/Documentation/ABI/testing/
H A Dsysfs-driver-hid-logitech-lg4ff4 Contact: Michal Malý <madcatxster@devoid-pointer.net>
12 Contact: Michal Malý <madcatxster@devoid-pointer.net>
14 mode is listed as follows:
16 Tag: Mode Name
18 Currently active mode is marked with an asterisk. List also
19 contains an abstract item "native" which always denotes the
20 native mode of the wheel. Echoing the mode tag switches the
21 wheel into the corresponding mode. Depending on the exact model
23 If a wheel cannot be switched into the desired mode, -EINVAL
26 This entry is not created for devices that have only one mode.
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/linux/Documentation/devicetree/bindings/spi/
H A Drenesas,sh-msiof.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 - $ref: spi-controller.yaml#
18 - items:
19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5
20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible
22 - items:
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dintel,ixp4xx-expansion-bus-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
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/linux/Documentation/devicetree/bindings/pci/
H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
26 space, Port Logic Registers (PL), Shadow Config-space Registers,
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H A Dsnps,dw-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller
17 # and make sure it's assigned with the vendor-specific compatible string.
21 const: snps,dw-pcie-ep
23 - compatible
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/linux/Documentation/devicetree/bindings/regmap/
H A Dregmap.txt5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dpanel.txt1 Device-Tree bindings for tilcdc DRM generic panel output driver
4 - compatible: value should be "ti,tilcdc,panel".
5 - panel-info: configuration info to configure LCDC correctly for the panel
6 - ac-bias: AC Bias Pin Frequency
7 - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
8 - dma-burst-sz: DMA burst size
9 - bpp: Bits per pixel
10 - fdd: FIFO DMA Request Delay
11 - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
12 - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
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/linux/arch/powerpc/platforms/chrp/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <asm/pci-bridge.h>
40 if (bus->number > 7) in gg2_read_config()
46 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); in gg2_read_config()
67 if (bus->number > 7) in gg2_write_config()
73 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); in gg2_write_config()
102 | (((bus->number - hose->first_busno) & 0xff) << 16) in rtas_read_config()
103 | (hose->global_number << 24); in rtas_read_config()
104 int ret = -1; in rtas_read_config()
117 | (((bus->number - hose->first_busno) & 0xff) << 16) in rtas_write_config()
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/linux/drivers/thunderbolt/
H A Dacpi.c1 // SPDX-License-Identifier: GPL-2.0
26 fwnode = fwnode_find_reference(acpi_fwnode_handle(adev), "usb4-host-interface", 0); in tb_acpi_add_link()
31 if (dev_fwnode(&nhi->pdev->dev) != fwnode) in tb_acpi_add_link()
58 pm_runtime_get_sync(&pdev->dev); in tb_acpi_add_link()
60 link = device_link_add(&pdev->dev, &nhi->pdev->dev, in tb_acpi_add_link()
65 dev_dbg(&nhi->pdev->dev, "created link from %s\n", in tb_acpi_add_link()
66 dev_name(&pdev->dev)); in tb_acpi_add_link()
69 dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n", in tb_acpi_add_link()
70 dev_name(&pdev->dev)); in tb_acpi_add_link()
73 pm_runtime_put(&pdev->dev); in tb_acpi_add_link()
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/linux/arch/arm/include/asm/
H A Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * instructions (which are not available from user mode) to ensure
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
137 * This means that reading a 32-bit word at address 0 returns the same
138 * value irrespective of the endian mode bit.
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/linux/arch/mips/boot/dts/brcm/
H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dcpm.txt4 - compatible : compatible list, currently only "ibm,cpm"
5 - dcr-access-method : "native"
6 - dcr-reg : < DCR register range >
9 - er-offset : All 4xx SoCs with a CPM controller have
15 er-offset = <1>.
16 - unused-units : specifier consist of one cell. For each
20 - idle-doze : specifier consist of one cell. For each
24 - standby : specifier consist of one cell. For each
28 - suspend : specifier consist of one cell. For each
39 refresh mode and any additional power
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/linux/net/dsa/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
22 tristate "No-op tag driver"
28 tristate "Tag driver for Atheros AR9331 SoC with built-in switch"
31 the Atheros AR9331 SoC with built-in switch.
38 tristate "Tag driver for Broadcom switches using in-frame headers"
45 tristate "Tag driver for Broadcom legacy switches using in-frame headers"
106 (VSC7511, VSC7512, VSC7513, VSC7514, VSC9953, VSC9959). In this mode,
108 hardware-defined injection/extraction frame header. Flow control
110 this mode.
116 custom VLAN-based header. Frames that require timestamping, such as
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/linux/drivers/gpu/drm/xe/abi/
H A Dguc_klvs_abi.h1 /* SPDX-License-Identifier: MIT */
14 * +---+-------+--------------------------------------------------------------+
17 * | 0 | 31:16 | **KEY** - KLV key identifier |
18 * | | | - `GuC Self Config KLVs`_ |
19 * | | | - `GuC VGT Policy KLVs`_ |
20 * | | | - `GuC VF Configuration KLVs`_ |
22 * | +-------+--------------------------------------------------------------+
23 * | | 15:0 | **LEN** - length of VALUE (in 32bit dwords) |
24 * +---+-------+--------------------------------------------------------------+
25 * | 1 | 31:0 | **VALUE** - actual value of the KLV (format depends on KEY) |
[all …]

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