/linux/tools/testing/selftests/bpf/prog_tests/ |
H A D | btf_endian.c | 1 // SPDX-License-Identifier: GPL-2.0 11 enum btf_endianness endian = BTF_LITTLE_ENDIAN; in test_btf_endian() local 13 enum btf_endianness endian = BTF_BIG_ENDIAN; in test_btf_endian() 17 enum btf_endianness swap_endian = 1 - endian; in test_btf_endian() 25 /* Load BTF in native endianness */ in test_btf_endian() 30 ASSERT_EQ(btf__endianness(btf), endian, "endian"); in test_btf_endian() 32 ASSERT_EQ(btf__endianness(btf), swap_endian, "endian"); in test_btf_endian() 34 /* Get raw BTF data in non-native endianness... */ in test_btf_endian() 44 ASSERT_EQ(btf__endianness(swap_btf), swap_endian, "endian"); in test_btf_endian() 51 /* both raw data should be identical (with non-native endianness) */ in test_btf_endian() [all …]
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/linux/arch/mips/boot/dts/brcm/ |
H A D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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H A D | bcm7125.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <202500000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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H A D | bcm7358.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 24 cpu_intc: interrupt-controller { 25 #address-cells = <0>; 26 compatible = "mti,cpu-interrupt-controller"; 28 interrupt-controller; [all …]
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H A D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <175625000>; 42 cpu_intc: interrupt-controller { 43 #address-cells = <0>; 44 compatible = "mti,cpu-interrupt-controller"; 46 interrupt-controller; [all …]
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H A D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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H A D | bcm7360.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 24 cpu_intc: interrupt-controller { 25 #address-cells = <0>; 26 compatible = "mti,cpu-interrupt-controller"; 28 interrupt-controller; [all …]
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H A D | bcm7362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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H A D | bcm7420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <93750000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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/linux/Documentation/devicetree/bindings/ |
H A D | common-properties.txt | 5 ---------- 13 - big-endian: Boolean; force big endian register accesses 15 know the peripheral always needs to be accessed in big endian (BE) mode. 16 - little-endian: Boolean; force little endian register accesses 18 peripheral always needs to be accessed in little endian (LE) mode. 19 - native-endian: Boolean; always use register accesses matched to the 20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel, 21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps 22 will ever be performed. Use this if the hardware "self-adjusts" 27 In such cases, little-endian is the preferred default, but it is not [all …]
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/linux/Documentation/devicetree/bindings/regmap/ |
H A D | regmap.txt | 5 little-endian, 6 big-endian, 7 native-endian: See common-properties.txt for a definition 10 Regmap defaults to little-endian register access on MMIO based 12 architectures that typically run big-endian operating systems 13 (e.g. PowerPC), registers can be defined as big-endian and must 16 On SoCs that can be operated in both big-endian and little-endian 19 chips), "native-endian" is used to allow using the same device tree 23 Scenario 1 : a register set in big-endian mode. 27 big-endian;
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips, 15 - Linus Walleij <linus.walleij@linaro.org> 19 pattern: '^bus@[0-9a-f]+$' 23 - enum: 24 - intel,ixp42x-expansion-bus-controller 25 - intel,ixp43x-expansion-bus-controller [all …]
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/linux/arch/arm/include/asm/ |
H A D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 * Big endian support: Copyright 2001, Nicolas Pitre 34 * First, the atomic bitops. These use native endian. 123 #include <asm-generic/bitops/non-atomic.h> 126 * A note about Endian-ness. 127 * ------------------------- 129 * When the ARM is put into big endian mode via CR15, the processor 132 * ------------ physical data bus bits ----------- 137 * This means that reading a 32-bit word at address 0 returns the same 138 * value irrespective of the endian mode bit. [all …]
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/linux/arch/xtensa/boot/dts/ |
H A D | xtfpga.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 compatible = "cdns,xtensa-xtfpga"; 4 #address-cells = <1>; 5 #size-cells = <1>; 6 interrupt-parent = <&pic>; 18 #address-cells = <1>; 19 #size-cells = <0>; 21 compatible = "cdns,xtensa-cpu"; 28 compatible = "cdns,xtensa-pic"; 33 #interrupt-cells = <2>; [all …]
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/linux/tools/testing/selftests/powerpc/tm/ |
H A D | tm-trap.c | 1 // SPDX-License-Identifier: GPL-2.0-only 21 * to zero which determines a BE endianness that is the native 27 * endianness "flipped back" to the native endianness (BE). 67 thread_endianness = MSR_LE & ucp->uc_mcontext.gp_regs[PT_MSR]; in trap_signal_handler() 70 * Little-Endian Machine in trap_signal_handler() 95 * the return from the signal handler the endianness in- in trap_signal_handler() 98 * and (4) are executed (tbegin.; trap;) and we get sim- in trap_signal_handler() 109 * a trap caught in non-transactional mode is the very in trap_signal_handler() 116 ucp->uc_mcontext.gp_regs[PT_NIP] += 16; in trap_signal_handler() 123 ucp->uc_mcontext.gp_regs[PT_MSR] |= 1UL; in trap_signal_handler() [all …]
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/linux/arch/m68k/include/asm/ |
H A D | io_no.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 * The non-MMU m68k and ColdFire IO and memory mapped hardware access 13 * functions have always worked in CPU native endian. We need to define 14 * that behavior here first before we include asm-generic/io.h. 50 return (addr >= IOMEMBASE) && (addr <= IOMEMBASE + IOMEMSIZE - 1); in __cf_internalio() 59 * We need to treat built-in peripherals and bus based address ranges 60 * differently. Local built-in peripherals (and the ColdFire SoC parts 61 * have quite a lot of them) are always native endian - which is big 62 * endian on m68k/ColdFire. Bus based address ranges, like the PCI bus, 63 * are accessed little endian - so we need to byte swap those. [all …]
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/linux/include/uapi/linux/ |
H A D | virtio_pcidev.h | 1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 11 * enum virtio_pcidev_ops - virtual PCI device operations 14 * the @data field should be filled in by the device (in little endian). 16 * the @data field contains the data to write (in little endian). 18 * the @data field should be filled in by the device (in little endian). 20 * the @data field contains the data to write (in little endian). 23 * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for 25 * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports 26 * the 16- or 32-bit write that would otherwise be done into memory, 44 * struct virtio_pcidev_msg - virtio PCI device operation [all …]
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/linux/tools/objtool/include/objtool/ |
H A D | endianness.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 6 #include <endian.h> 11 * compilation for little endian on big endian and vice versa. 12 * To be used for multi-byte values conversion, which are read from / about 13 * to be written to a target native endianness ELF file. 18 (elf->ehdr.e_ident[EI_DATA] == ELFDATA2LSB); in need_bswap()
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/linux/drivers/mtd/nand/raw/brcmnand/ |
H A D | brcmnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 16 /* Special register offset constant to intercept a non-MMIO access 40 if (soc && soc->prepare_data_bus) in brcmnand_soc_data_bus_prepare() 41 soc->prepare_data_bus(soc, true, is_param); in brcmnand_soc_data_bus_prepare() 47 if (soc && soc->prepare_data_bus) in brcmnand_soc_data_bus_unprepare() 48 soc->prepare_data_bus(soc, false, is_param); in brcmnand_soc_data_bus_unprepare() 55 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcmnand_readl() 56 * endian I/O). in brcmnand_readl() 58 * Other architectures (e.g., ARM) either do not support big endian, or in brcmnand_readl() 59 * else leave I/O in little endian mode. in brcmnand_readl() [all …]
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/linux/drivers/video/fbdev/core/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 72 Allow generic frame-buffer functions to work on displays with 1, 2 104 Allow generic frame-buffer to provide get_fb_unmapped_area 112 non-native endianness (e.g. Little-Endian framebuffer on a 113 Big-Endian machine). Most probably you don't have such hardware, 121 bool "Support for Big- and Little-Endian framebuffers" 124 bool "Support for Big-Endian framebuffers only" 127 bool "Support for Little-Endian framebuffers only" 211 terms of number of tiles in the x- and y-axis.
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/linux/drivers/phy/broadcom/ |
H A D | phy-brcm-usb-init.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (C) 2014-2017 Broadcom 84 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcm_usb_readl() 85 * endian I/O). in brcm_usb_readl() 87 * Other architectures (e.g., ARM) either do not support big endian, or in brcm_usb_readl() 88 * else leave I/O in little endian mode. in brcm_usb_readl() 117 if (ini->ops->init_ipp) in brcm_usb_init_ipp() 118 ini->ops->init_ipp(ini); in brcm_usb_init_ipp() 123 if (ini->ops->init_common) in brcm_usb_init_common() 124 ini->ops->init_common(ini); in brcm_usb_init_common() [all …]
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/linux/arch/arc/include/uapi/asm/ |
H A D | swab.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 10 * -Support single cycle endian-swap insn in ARC700 4.10 13 * -Better htonl implementation (5 instead of 9 ALU instructions) 14 * -Hardware assisted single cycle bswap (Use Case of ARC custom instrn) 22 /* Native single cycle endian swap insn */ 37 /* Several ways of Endian-Swap Emulation for ARC
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/linux/fs/jfs/ |
H A D | jfs_unicode.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright (C) International Business Machines Corp., 2000-2002 4 * Portions Copyright (C) Christoph Hellwig, 2001-2002 17 #define free_UCSname(COMP) kfree((COMP)->name) 40 while (n-- && *ucs2) /* Copy the strings */ in UniStrncpy_le() 44 while (n--) /* Pad with nulls */ in UniStrncpy_le() 50 * UniStrncmp_le: Compare length limited string - native to little-endian 57 while ((*ucs1 == __le16_to_cpu(*ucs2)) && *ucs1 && --n) { in UniStrncmp_le() 61 return (int) *ucs1 - (int) __le16_to_cpu(*ucs2); in UniStrncmp_le() 65 * UniStrncpy_to_le: Copy length limited string with pad to little-endian [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | fsl,dspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li <Frank.Li@nxp.com> 15 - enum: 16 - fsl,vf610-dspi 17 - fsl,ls1021a-v1.0-dspi 18 - fsl,ls1012a-dspi 19 - fsl,ls1028a-dspi 20 - fsl,ls1043a-dspi [all …]
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/linux/drivers/md/dm-vdo/ |
H A D | encodings.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 20 * An in-memory representation of a version number for versioned structures on disk. 34 * A packed, machine-independent, on-disk representation of a version_number. Both fields are 35 * stored in little-endian byte order. 57 /* A packed, machine-independent, on-disk representation of a component header. */ 127 * in both the on-disk and in-memory layouts. It consists of the 36 low-order bits of a 128 * physical_block_number_t (addressing 256 terabytes with a 4KB block size) and a 4-bit encoding of 131 * Of the 8 high bits of the 5-byte structure: 133 * Bits 7..4: The four highest bits of the 36-bit physical block number 134 * Bits 3..0: The 4-bit block_mapping_state [all …]
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