xref: /linux/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml (revision 0f46f50845ce75bfaba62df0421084d23bb6a72f) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Always-On Subsystem side channel
8
9maintainers:
10  - Bjorn Andersson <bjorn.andersson@linaro.org>
11
12description:
13  This binding describes the hardware component responsible for side channel
14  requests to the always-on subsystem (AOSS), used for certain power management
15  requests that is not handled by the standard RPMh interface. Each client in the
16  SoC has its own block of message RAM and IRQ for communication with the AOSS.
17  The protocol used to communicate in the message RAM is known as Qualcomm
18  Messaging Protocol (QMP)
19
20  The AOSS side channel exposes control over a set of resources, used to control
21  a set of debug related clocks and to affect the low power state of resources
22  related to the secondary subsystems.
23
24properties:
25  compatible:
26    items:
27      - enum:
28          - qcom,milos-aoss-qmp
29          - qcom,qcs615-aoss-qmp
30          - qcom,qcs8300-aoss-qmp
31          - qcom,qdu1000-aoss-qmp
32          - qcom,sa8255p-aoss-qmp
33          - qcom,sa8775p-aoss-qmp
34          - qcom,sar2130p-aoss-qmp
35          - qcom,sc7180-aoss-qmp
36          - qcom,sc7280-aoss-qmp
37          - qcom,sc8180x-aoss-qmp
38          - qcom,sc8280xp-aoss-qmp
39          - qcom,sdx75-aoss-qmp
40          - qcom,sdm845-aoss-qmp
41          - qcom,sm6350-aoss-qmp
42          - qcom,sm7150-aoss-qmp
43          - qcom,sm8150-aoss-qmp
44          - qcom,sm8250-aoss-qmp
45          - qcom,sm8350-aoss-qmp
46          - qcom,sm8450-aoss-qmp
47          - qcom,sm8550-aoss-qmp
48          - qcom,sm8650-aoss-qmp
49          - qcom,sm8750-aoss-qmp
50          - qcom,x1e80100-aoss-qmp
51      - const: qcom,aoss-qmp
52
53  reg:
54    maxItems: 1
55    description:
56      The base address and size of the message RAM for this client's
57      communication with the AOSS
58
59  interrupts:
60    maxItems: 1
61    description:
62      Should specify the AOSS message IRQ for this client
63
64  mboxes:
65    maxItems: 1
66    description:
67      Reference to the mailbox representing the outgoing doorbell in APCS for
68      this client, as described in mailbox/mailbox.txt
69
70  "#clock-cells":
71    const: 0
72    description:
73      The single clock represents the QDSS clock.
74
75required:
76  - compatible
77  - reg
78  - interrupts
79  - mboxes
80  - "#clock-cells"
81
82additionalProperties: false
83
84patternProperties:
85  "^(cx|mx|ebi)$":
86    type: object
87    description:
88      The AOSS side channel also provides the controls for three cooling devices,
89      these are expressed as subnodes of the QMP node. The name of the node is
90      used to identify the resource and must therefore be "cx", "mx" or "ebi".
91
92    properties:
93      "#cooling-cells":
94        const: 2
95
96    required:
97      - "#cooling-cells"
98
99    additionalProperties: false
100
101examples:
102  - |
103    #include <dt-bindings/interrupt-controller/arm-gic.h>
104
105    aoss_qmp: qmp@c300000 {
106      compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
107      reg = <0x0c300000 0x100000>;
108      interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
109      mboxes = <&apss_shared 0>;
110
111      #clock-cells = <0>;
112
113      cx_cdev: cx {
114        #cooling-cells = <2>;
115      };
116
117      mx_cdev: mx {
118        #cooling-cells = <2>;
119      };
120    };
121...
122