xref: /linux/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml (revision 208eed95fc710827b100266c9450ae84d46727bd) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Always-On Subsystem side channel
8
9maintainers:
10  - Bjorn Andersson <bjorn.andersson@linaro.org>
11
12description:
13  This binding describes the hardware component responsible for side channel
14  requests to the always-on subsystem (AOSS), used for certain power management
15  requests that is not handled by the standard RPMh interface. Each client in the
16  SoC has its own block of message RAM and IRQ for communication with the AOSS.
17  The protocol used to communicate in the message RAM is known as Qualcomm
18  Messaging Protocol (QMP)
19
20  The AOSS side channel exposes control over a set of resources, used to control
21  a set of debug related clocks and to affect the low power state of resources
22  related to the secondary subsystems.
23
24properties:
25  compatible:
26    items:
27      - enum:
28          - qcom,glymur-aoss-qmp
29          - qcom,kaanapali-aoss-qmp
30          - qcom,milos-aoss-qmp
31          - qcom,qcs615-aoss-qmp
32          - qcom,qcs8300-aoss-qmp
33          - qcom,qdu1000-aoss-qmp
34          - qcom,sa8255p-aoss-qmp
35          - qcom,sa8775p-aoss-qmp
36          - qcom,sar2130p-aoss-qmp
37          - qcom,sc7180-aoss-qmp
38          - qcom,sc7280-aoss-qmp
39          - qcom,sc8180x-aoss-qmp
40          - qcom,sc8280xp-aoss-qmp
41          - qcom,sdx75-aoss-qmp
42          - qcom,sdm845-aoss-qmp
43          - qcom,sm6350-aoss-qmp
44          - qcom,sm7150-aoss-qmp
45          - qcom,sm8150-aoss-qmp
46          - qcom,sm8250-aoss-qmp
47          - qcom,sm8350-aoss-qmp
48          - qcom,sm8450-aoss-qmp
49          - qcom,sm8550-aoss-qmp
50          - qcom,sm8650-aoss-qmp
51          - qcom,sm8750-aoss-qmp
52          - qcom,x1e80100-aoss-qmp
53      - const: qcom,aoss-qmp
54
55  reg:
56    maxItems: 1
57    description:
58      The base address and size of the message RAM for this client's
59      communication with the AOSS
60
61  interrupts:
62    maxItems: 1
63    description:
64      Should specify the AOSS message IRQ for this client
65
66  mboxes:
67    maxItems: 1
68    description:
69      Reference to the mailbox representing the outgoing doorbell in APCS for
70      this client, as described in mailbox/mailbox.txt
71
72  "#clock-cells":
73    const: 0
74    description:
75      The single clock represents the QDSS clock.
76
77required:
78  - compatible
79  - reg
80  - interrupts
81  - mboxes
82  - "#clock-cells"
83
84additionalProperties: false
85
86patternProperties:
87  "^(cx|mx|ebi)$":
88    type: object
89    description:
90      The AOSS side channel also provides the controls for three cooling devices,
91      these are expressed as subnodes of the QMP node. The name of the node is
92      used to identify the resource and must therefore be "cx", "mx" or "ebi".
93
94    properties:
95      "#cooling-cells":
96        const: 2
97
98    required:
99      - "#cooling-cells"
100
101    additionalProperties: false
102
103examples:
104  - |
105    #include <dt-bindings/interrupt-controller/arm-gic.h>
106
107    aoss_qmp: qmp@c300000 {
108      compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
109      reg = <0x0c300000 0x100000>;
110      interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
111      mboxes = <&apss_shared 0>;
112
113      #clock-cells = <0>;
114
115      cx_cdev: cx {
116        #cooling-cells = <2>;
117      };
118
119      mx_cdev: mx {
120        #cooling-cells = <2>;
121      };
122    };
123...
124