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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-mux-gpmux.txt1 General Purpose I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a mux controller
4 from the mux subsystem to route the I2C signals.
6 .-----. .-----.
8 .------------. '-----' '-----'
10 | | .--------+--------'
11 | .------. | .------+ child bus A, on MUX value set to 0
12 | | I2C |-|--| Mux |
13 | '------' | '--+---+ child bus B, on MUX value set to 1
14 | .------. | | '----------+--------+--------.
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H A Di2c-mux-gpmux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-natte.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-natte.dts - Device Tree include file for the Natte board
11 mux: mux-controller { label
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
22 io-channels = <&adc 5>;
23 io-channel-names = "parent";
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqoriq-clock.txt5 multiple phase locked loops (PLL) to create a variety of frequencies
14 --------------- -------------
21 - compatible: Should contain a chip-specific clock block compatible
22 string and (if applicable) may contain a chassis-version clock
25 Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
26 * "fsl,p2041-clockgen"
27 * "fsl,p3041-clockgen"
28 * "fsl,p4080-clockgen"
29 * "fsl,p5020-clockgen"
30 * "fsl,p5040-clockgen"
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H A Dfsl,qoriq-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,qoriq-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 multiple phase locked loops (PLL) to create a variety of frequencies
24 --------------- -------------
36 - items:
37 - enum:
38 - fsl,p2041-clockgen
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/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_clk_pll.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #include <dt-bindings/clock/tegra210-car.h>
113 /* Post divider <-> register value mapping. */
152 #define MUX(_id, cname, plists, o, s, w) \ macro
480 /* Aliases used in super mux. */
491 MUX(0, "pllD2_src", mux_pll_srcs, PLLD2_BASE, 25, 2),
492 MUX(0, "pllDP_src", mux_pll_srcs, PLLDP_BASE, 25, 2),
493 MUX(0, "pllC4_src", mux_pll_srcs, PLLC4_BASE, 25, 2),
494 MUX(0, "pllE_src1", mux_plle_src1, PLLE_AUX, 2, 1),
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/freebsd/sys/sys/
H A Dkbio.h1 /*-
30 #define CLKED 1 /* Caps locked */
31 #define NLKED 2 /* Num locked */
32 #define SLKED 4 /* Scroll locked */
33 #define ALKED 8 /* AltGr locked */
47 #define KB_84 1 /* 'old' 84 key AT-keyboard */
48 #define KB_101 2 /* MF-101 or MF-102 keyboard */
79 /* add/remove keyboard to/from mux */
160 /* 0x7b-0x7f reserved do not use ! */
201 #define PASTE 0xa3 /* paste from cut-paste buffer */
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/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipcreg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 2010-2015 Broadcom Corporation
10 * distributed with the Asus RT-N16 firmware source code release.
77 /* siba backplane configuration broadcast (siba-only) */
81 #define CHIPC_GPIOPU 0x58 /**< pull-up mask (rev >= 20) */
97 #define CHIPC_GPIOTIMERVAL 0x88 /**< gpio-based LED duty cycle (rev >= 16) */
100 /* clock control registers (non-PMU devices) */
114 #define CHIPC_PLL_SLOWCLK_CTL 0xB8 /* "slowclock" (rev 6-9) */
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/freebsd/sys/dev/usb/net/
H A Duhso.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
74 int ht_muxport; /* Mux. port no */
120 * can be detected during run-time.
144 * Multiplexed serial port destination sub-port names
152 #define UHSO_MPORT_TYPE_NOMAX 8 /* Max number of mux ports */
299 static int uhso_debug = -1;
395 /* Config for the raw IP-packet interface */
519 if (uaa->usb_mode != USB_MODE_HOST) in uhso_probe()
521 if (uaa->info.bConfigIndex != 0) in uhso_probe()
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/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_mac_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
611 * [0x7c] SERDES 32-bit interface shift configuration (when swap is
616 * [0x80] SERDES 32-bit interface shift configuration (when swap is
621 * [0x84] SERDES 32-bit interface bit selection
625 * [0x88] SERDES 32-bit interface bit selection
766 * 0 - 10/100/1000
767 * 1 - 1/2.5/10G
772 * 00 - 1/2.5G SGMII
773 * 01 - 10G XAUI/RXAUI
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dmotorola-mapphone-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "motorola-cpcap-mapphone.dtsi"
10 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_serdes_25g_regs.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
132 /* Bit-wise write enable */
139 * 0x1 – Select inter-macro reference clock from the left side
141 * 0x3 – Select inter-macro reference clock from the right side
156 * 0x2 – Select inter-macro reference clock input from right side
172 * 0x2 – Select inter-macro reference clock input from left side
186 * Program memory acknowledge - Only when the access
193 * Data memory acknowledge - Only when the access
200 * 0 - keep cpu clk as sb clk
205 * 0x0 – OIF CEI-28G-SR
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/freebsd/sys/dev/kbdmux/
H A Dkbdmux.c5 /*-
6 * SPDX-License-Identifier: BSD-2-Clause
90 * Note that callout is initialized as not MP-safe to make sure
98 mtx_init(&(s)->ks_lock, "kbdmux", NULL, MTX_DEF|MTX_RECURSE)
100 mtx_destroy(&(s)->ks_lock)
102 mtx_lock(&(s)->ks_lock)
104 mtx_unlock(&(s)->ks_lock)
106 mtx_assert(&(s)->ks_lock, (w))
182 if (state->ks_inq_length == KBDMUX_Q_SIZE) in kbdmux_kbd_putc()
185 p = (state->ks_inq_start + state->ks_inq_length) % KBDMUX_Q_SIZE; in kbdmux_kbd_putc()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZScheduleZEC12.td1 //=- SystemZScheduleZEC12.td - SystemZ Scheduling Definitions --*- tblgen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
67 foreach L = 1-30 in {
86 foreach Num = 2-6 in { let ReleaseAtCycles = [Num] in {
100 // -------------------------- INSTRUCTIONS ---------------------------------- //
108 //===----------------------------------------------------------------------===//
110 //===----------------------------------------------------------------------===//
112 // Pseudo -> LA / LAY
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H A DSystemZScheduleZ196.td1 //=- SystemZScheduleZ196.td - SystemZ Scheduling Definitions ---*- tblgen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
67 foreach L = 1-30 in {
85 foreach Num = 2-6 in { let ReleaseAtCycles = [Num] in {
97 // -------------------------- INSTRUCTIONS ---------------------------------- //
105 //===----------------------------------------------------------------------===//
107 //===----------------------------------------------------------------------===//
109 def : InstRW<[WLat1, FXU, NormalGr], (instregex "ADJDYNALLOC$")>; // Pseudo -> LA / LAY
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H A DSystemZScheduleZ15.td1 //-- SystemZScheduleZ15.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
71 foreach L = 1-30 in
95 foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in {
116 // -------------------------- INSTRUCTIONS ---------------------------------- //
124 //===----------------------------------------------------------------------===//
126 //===----------------------------------------------------------------------===//
128 // Pseudo -> LA / LAY
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H A DSystemZScheduleZ14.td1 //-- SystemZScheduleZ14.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
71 foreach L = 1-30 in
95 foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in {
116 // -------------------------- INSTRUCTIONS ---------------------------------- //
124 //===----------------------------------------------------------------------===//
126 //===----------------------------------------------------------------------===//
128 // Pseudo -> LA / LAY
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H A DSystemZScheduleZ13.td1 //-- SystemZScheduleZ13.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
71 foreach L = 1-30 in
95 foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in {
116 // -------------------------- INSTRUCTIONS ---------------------------------- //
124 //===----------------------------------------------------------------------===//
126 //===----------------------------------------------------------------------===//
128 // Pseudo -> LA / LAY
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H A DSystemZScheduleZ16.td1 //-- SystemZScheduleZ16.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
71 foreach L = 1-30 in
95 foreach Num = 2-5 in { let ReleaseAtCycles = [Num] in {
117 // -------------------------- INSTRUCTIONS ---------------------------------- //
125 //===----------------------------------------------------------------------===//
127 //===----------------------------------------------------------------------===//
129 // Pseudo -> LA / LAY
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/freebsd/sys/dev/vt/
H A Dvt_core.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
124 #define VT_UNIT(vw) ((vw)->vw_device->vd_unit * VT_MAXWINDOWS + \
125 (vw)->vw_number)
136 static VT_SYSCTL_INT(slow_down, 0, "Non-zero make console slower and synchronous.");
144 "See kbdmap(5) to configure (typically Ctrl-Alt-Delete).");
146 "See kbdmap(5) to configure (typically Ctrl-Alt-Esc).");
289 if (main_vd->vd_driver != NULL) in vt_update_static()
290 printf("VT(%s): %s %ux%u\n", main_vd->vd_driver->vd_name, in vt_update_static()
291 (main_vd->vd_flags & VDF_TEXTMODE) ? "text" : "resolution", in vt_update_static()
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/freebsd/sys/contrib/ncsw/Peripherals/QM/
H A Dfsl_qman.h3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
50 /* QMan s/w corenet portal, low-level i/face */
53 e_QmPortalPCI = 0, /* PI index, cache-inhibited */
54 e_QmPortalPCE, /* PI index, cache-enabled */
55 e_QmPortalPVB /* valid-bit */
59 e_QmPortalEqcrCCI = 0, /* CI index, cache-inhibited */
60 e_QmPortalEqcrCCE /* CI index, cache-enabled */
64 e_QmPortalDqrrCCI = 0, /* CI index, cache-inhibited */
65 e_QmPortalDqrrCCE, /* CI index, cache-enabled */
70 e_QmPortalMrCCI = 0, /* CI index, cache-inhibited */
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/freebsd/sys/dev/sound/pci/
H A Des137x.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause
30 /*-
128 #define ES_BLK_ALIGN (~(ES_BLK_MIN - 1))
148 * 32bit Ensoniq Configuration (es->escfg).
149 * ----------------------------------------
151 * +-------+--------+------+------+---------+--------+---------+---------+
153 * +-------+--------+------+------+---------+--------+---------+---------+
157 * +-------+--------+------+------+---------+--------+---------+---------+
200 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val"
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/freebsd/sys/dev/atkbdc/
H A Dpsm.c1 /*-
28 * Thanks are also due to Rick Macklem, rick@snowhite.cis.uoguelph.ca -
36 * Andrew Herbert <andrew@werple.apana.org.au> - 8 June 1993
39 * Andrew Herbert - 12 June 1993
42 * - 13 June 1993
44 * Modified for PS/2 AUX mouse by Shoji Yuen <yuen@nuie.nagoya-u.ac.jp>
45 * - 24 October 1993
48 * Kazutaka Yokota <yokota@zodiac.mech.utsunomiya-u.ac.jp>
49 * - 3, 14, 22 October 1996.
50 * - 12 November 1996. IOCTLs and rearranging `psmread', `psmioctl'...
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/freebsd/sys/dev/syscons/
H A Dsyscons.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1992-1998 Søren Schmidt
95 #define KEYCODE_BS 0x0e /* "<-- Backspace" key, XXX */
97 /* NULL-safe version of "tty_opened()" */
102 static int sc_console_unit = -1;
273 /* ec -- emergency console. */
306 fb = main_console.sc->adp->va_window; in ec_putc()
312 mysize = xsize * (ysize - 2 * yborder); in ec_putc()
317 -1 : in ec_putc()
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