/linux/Documentation/devicetree/bindings/mux/ |
H A D | mux-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Rosin <peda@axentia.se> 13 A multiplexer (or mux) controller will have one, or several, consumer devices 14 that uses the mux controller. Thus, a mux controller can possibly control 16 multiplexer needed by each consumer, but a single mux controller can of course 19 A mux controller provides a number of states to its consumers, and the state 20 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer, [all …]
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H A D | mux-consumer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Rosin <peda@axentia.se> 13 Mux controller consumers should specify a list of mux controllers that they 14 want to use with a property containing a 'mux-ctrl-list': 16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list] 17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier] 18 mux-ctrl-phandle : phandle to mux controller node [all …]
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H A D | reg-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic register bitfield-based multiplexer controller 10 - Peter Rosin <peda@axentia.se> 19 - reg-mux # parent device of mux controller is not syscon device 20 - mmio-mux # parent device of mux controller is syscon device 24 '#mux-control-cells': 27 mux-reg-masks: [all …]
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H A D | adi,adg792a.txt | 4 - compatible : "adi,adg792a" or "adi,adg792g" 5 - #mux-control-cells : <0> if parallel (the three muxes are bound together 6 with a single mux controller controlling all three muxes), or <1> if 7 not (one mux controller for each mux). 8 * Standard mux-controller bindings as described in mux-controller.yaml 11 - gpio-controller : if present, #gpio-cells below is required. 12 - #gpio-cells : should be <2> 13 - First cell is the GPO line number, i.e. 0 or 1 14 - Second cell is used to specify active high (0) 18 - idle-state : if present, array of states that the mux controllers will have [all …]
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H A D | gpio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GPIO-based multiplexer controller 10 - Peter Rosin <peda@axentia.se> 22 const: gpio-mux 24 mux-gpios: 28 '#mux-control-cells': 31 '#mux-state-cells': [all …]
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/linux/drivers/clk/ti/ |
H A D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * Tero Kristo <t-kristo@ti.com> 10 #include <linux/clk-provider.h> 23 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local 28 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent() 34 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent() 35 val &= mux->mask; in ti_clk_mux_get_parent() 37 if (mux->table) { in ti_clk_mux_get_parent() 41 if (mux->table[i] == val) in ti_clk_mux_get_parent() 43 return -EINVAL; in ti_clk_mux_get_parent() [all …]
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/linux/drivers/clk/mediatek/ |
H A D | clk-mux.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/clk-provider.h> 18 #include "clk-mux.h" 35 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable_setclr() local 38 if (mux->lock) in mtk_clk_mux_enable_setclr() 39 spin_lock_irqsave(mux->lock, flags); in mtk_clk_mux_enable_setclr() 41 __acquire(mux->lock); in mtk_clk_mux_enable_setclr() 43 regmap_write(mux->regmap, mux->data->clr_ofs, in mtk_clk_mux_enable_setclr() 44 BIT(mux->data->gate_shift)); in mtk_clk_mux_enable_setclr() 48 * not be effective yet. Set the update bit to ensure the mux gets in mtk_clk_mux_enable_setclr() [all …]
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H A D | clk-cpumux.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org> 7 #include <linux/clk-provider.h> 15 #include "clk-mtk.h" 16 #include "clk-cpumux.h" 33 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_get_parent() local 36 regmap_read(mux->regmap, mux->reg, &val); in clk_cpumux_get_parent() 38 val >>= mux->shift; in clk_cpumux_get_parent() 39 val &= mux->mask; in clk_cpumux_get_parent() 46 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_set_parent() local [all …]
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/linux/drivers/iio/multiplexer/ |
H A D | iio-mux.c | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <linux/mux/consumer.h> 29 struct mux { struct 39 static int iio_mux_select(struct mux *mux, int idx) in iio_mux_select() argument 41 struct mux_child *child = &mux->child[idx]; in iio_mux_select() 42 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select() 46 ret = mux_control_select_delay(mux->control, chan->channel, in iio_mux_select() 47 mux->delay_us); in iio_mux_select() 49 mux->cached_state = -1; in iio_mux_select() 53 if (mux->cached_state == chan->channel) in iio_mux_select() [all …]
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/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_ring_mux.c | 43 static inline struct amdgpu_mux_entry *amdgpu_ring_mux_sw_entry(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_sw_entry() argument 46 return ring->entry_index < mux->ring_entry_size ? in amdgpu_ring_mux_sw_entry() 47 &mux->ring_entry[ring->entry_index] : NULL; in amdgpu_ring_mux_sw_entry() 51 static void amdgpu_ring_mux_copy_pkt_from_sw_ring(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_copy_pkt_from_sw_ring() argument 56 struct amdgpu_ring *real_ring = mux->real_ring; in amdgpu_ring_mux_copy_pkt_from_sw_ring() 58 start = s_start & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring() 59 end = s_end & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring() 66 amdgpu_ring_alloc(real_ring, (ring->ring_size >> 2) + end - start); in amdgpu_ring_mux_copy_pkt_from_sw_ring() 67 amdgpu_ring_write_multiple(real_ring, (void *)&ring->ring[start], in amdgpu_ring_mux_copy_pkt_from_sw_ring() 68 (ring->ring_size >> 2) - start); in amdgpu_ring_mux_copy_pkt_from_sw_ring() [all …]
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/linux/sound/soc/codecs/ |
H A D | tas5086.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 * - implement DAPM and input muxing 9 * - implement modulation limit 10 * - implement non-default PWM start 13 * because the registers are of unequal size, and multi-byte registers 18 * it doesn't matter because the entire map can be accessed as 8-bit 21 * routines have to be open-coded. 70 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */ 88 * Default TAS5086 power-up configuration 172 size = tas5086_register_size(&client->dev, reg); in tas5086_reg_write() [all …]
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H A D | rt5665.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * rt5665.c -- RT5665/RT5658 ALSA SoC audio codec driver 26 #include <sound/soc-dapm.h> 887 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0); 888 static const DECLARE_TLV_DB_SCALE(mono_vol_tlv, -1400, 150, 0); 889 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); 890 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); 891 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); 892 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); 894 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0); [all …]
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H A D | rt5677.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * rt5677.c -- RT5677 ALSA SoC audio codec driver 29 #include <sound/soc-dapm.h> 35 #include "rt5677-spi.h" 552 * rt5677_dsp_mode_i2c_write_addr - Write value to address on DSP mode. 563 struct snd_soc_component *component = rt5677->component; in rt5677_dsp_mode_i2c_write_addr() 566 mutex_lock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_write_addr() 568 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, in rt5677_dsp_mode_i2c_write_addr() 571 dev_err(component->dev, "Failed to set addr msb value: %d\n", ret); in rt5677_dsp_mode_i2c_write_addr() 575 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, in rt5677_dsp_mode_i2c_write_addr() [all …]
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/linux/include/linux/mux/ |
H A D | driver.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * mux/driver.h - definitions for the multiplexer driver interface 13 #include <dt-bindings/mux/mux.h> 22 * struct mux_control_ops - Mux controller operations for a mux chip. 23 * @set: Set the state of the given mux controller. 26 int (*set)(struct mux_control *mux, int state); 30 * struct mux_control - Represents a mux controller. 31 * @lock: Protects the mux controller state. 32 * @chip: The mux chip that is handling this mux controller. 33 * @cached_state: The current mux controller state, or -1 if none. [all …]
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/linux/drivers/clk/ |
H A D | clk-mux.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org> 10 #include <linux/clk-provider.h> 21 * prepare - clk_prepare only ensures that parents are prepared 22 * enable - clk_enable only ensures that parents are enabled 23 * rate - rate is only affected by parent switching. No clk_set_rate support 24 * parent - parent is adjustable through clk_set_parent 27 static inline u32 clk_mux_readl(struct clk_mux *mux) in clk_mux_readl() argument 29 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl() 30 return ioread32be(mux->reg); in clk_mux_readl() [all …]
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/linux/arch/arm/boot/dts/nuvoton/ |
H A D | nuvoton-wpcm450.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 #include <dt-bindings/interrupt-controller/irq.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 23 #address-cells = <1>; 24 #size-cells = <0>; 27 compatible = "arm,arm926ej-s"; 33 clk24m: clock-24mhz { 35 compatible = "fixed-clock"; 36 clock-frequency = <24000000>; [all …]
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/linux/Documentation/i2c/ |
H A D | i2c-topology.rst | 6 than a straight-forward I2C bus with one adapter and one or more devices. 10 1. A mux may be needed on the bus to prevent address collisions. 25 I2C transfers, and all adapters with a parent are part of an "i2c-mux" 28 Depending of the particular mux driver, something happens when there is 29 an I2C transfer on one of its child adapters. The mux driver can 30 obviously operate a mux, but it can also do arbitration with an external 31 bus master or open a gate. The mux driver has two operations for this, 40 mux-locked or parent-locked muxes. 43 Mux-locked muxes 44 ---------------- [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | mdio-mux-multiplexer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 13 This is a special case of MDIO mux when MDIO mux is defined as a consumer 14 of a mux producer device. The mux producer can be of any type like mmio mux 15 producer, gpio mux producer or generic register based mux producer. 19 - $ref: /schemas/net/mdio-mux.yaml# 23 const: mdio-mux-multiplexer [all …]
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/linux/include/dt-bindings/clock/ |
H A D | tegra186-clock.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 384 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 */ 386 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S3 */ 388 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPDF_IN */ 392 /** @clkdesc{spi_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_SPI3} */ 394 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C1} */ 396 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5} */ 398 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPI1 */ 400 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_ISP */ 402 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_VI */ [all …]
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/linux/drivers/clk/sophgo/ |
H A D | clk-cv18xx-ip.c | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <linux/clk-provider.h> 11 #include "clk-cv18xx-ip.h" 25 return cv1800_clk_setbit(&gate->common, &gate->gate); in gate_enable() 32 cv1800_clk_clearbit(&gate->common, &gate->gate); in gate_disable() 39 return cv1800_clk_checkbit(&gate->common, &gate->gate); in gate_is_enabled() 90 return cv1800_clk_setbit(&div->common, &div->gate); in div_enable() 97 cv1800_clk_clearbit(&div->common, &div->gate); in div_disable() 104 return cv1800_clk_checkbit(&div->common, &div->gate); in div_is_enabled() 114 if (div->width == 0) in div_helper_set_rate() [all …]
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/linux/net/kcm/ |
H A D | kcmsock.c | 1 // SPDX-License-Identifier: GPL-2.0-only 46 return (struct kcm_tx_msg *)skb->cb; in kcm_tx_msg() 51 csk->sk_err = EPIPE; in report_csk_error() 58 struct sock *csk = psock->sk; in kcm_abort_tx_psock() 59 struct kcm_mux *mux = psock->mux; in kcm_abort_tx_psock() local 63 spin_lock_bh(&mux->lock); in kcm_abort_tx_psock() 65 if (psock->tx_stopped) { in kcm_abort_tx_psock() 66 spin_unlock_bh(&mux->lock); in kcm_abort_tx_psock() 70 psock->tx_stopped = 1; in kcm_abort_tx_psock() 71 KCM_STATS_INCR(psock->stats.tx_aborts); in kcm_abort_tx_psock() [all …]
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/linux/drivers/clk/qcom/ |
H A D | clk-krait.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <linux/clk-provider.h> 13 #include <asm/krait-l2-accessors.h> 15 #include "clk-krait.h" 23 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) in __krait_mux_set_sel() argument 30 regval = krait_get_l2_indirect_reg(mux->offset); in __krait_mux_set_sel() 33 if (mux->disable_sec_src_gating) { in __krait_mux_set_sel() 35 krait_set_l2_indirect_reg(mux->offset, regval); in __krait_mux_set_sel() 38 regval &= ~(mux->mask << mux->shift); in __krait_mux_set_sel() 39 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel() [all …]
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H A D | krait-cc.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/clk-provider.h> 16 #include "clk-krait.h" 48 struct krait_mux_clk *mux = container_of(nb, struct krait_mux_clk, in krait_notifier_cb() local 52 mux->old_index = krait_mux_clk_ops.get_parent(&mux->hw); in krait_notifier_cb() 53 ret = krait_mux_clk_ops.set_parent(&mux->hw, mux->safe_sel); in krait_notifier_cb() 54 mux->reparent = false; in krait_notifier_cb() 61 if (!mux->reparent) in krait_notifier_cb() 62 ret = krait_mux_clk_ops.set_parent(&mux->hw, in krait_notifier_cb() 63 mux->old_index); in krait_notifier_cb() [all …]
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/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gx.dtsi" 8 #include <dt-bindings/clock/gxbb-clkc.h> 9 #include <dt-bindings/clock/gxbb-aoclkc.h> 10 #include <dt-bindings/gpio/meson-gxl-gpio.h> 11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 14 compatible = "amlogic,meson-gxl"; 18 compatible = "amlogic,meson-gxl-usb-ctrl"; 21 #address-cells = <2>; 22 #size-cells = <2>; [all …]
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H A D | meson-gxbb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson-gx.dtsi" 7 #include "meson-gx-mali450.dtsi" 8 #include <dt-bindings/gpio/meson-gxbb-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 10 #include <dt-bindings/clock/gxbb-clkc.h> 11 #include <dt-bindings/clock/gxbb-aoclkc.h> 12 #include <dt-bindings/reset/gxbb-aoclkc.h> 15 compatible = "amlogic,meson-gxbb"; 19 compatible = "amlogic,meson-gxbb-usb2-phy"; [all …]
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