Lines Matching +full:mux +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk-provider.h>
23 struct clk_omap_mux *mux = to_clk_omap_mux(hw);
28 * FIXME need a mux-specific flag to determine if val is bitwise or
34 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift;
35 val &= mux->mask;
37 if (mux->table) {
41 if (mux->table[i] == val)
43 return -EINVAL;
46 if (val && (mux->flags & CLK_MUX_INDEX_BIT))
47 val = ffs(val) - 1;
49 if (val && (mux->flags & CLK_MUX_INDEX_ONE))
50 val--;
53 return -EINVAL;
60 struct clk_omap_mux *mux = to_clk_omap_mux(hw);
63 if (mux->table) {
64 index = mux->table[index];
66 if (mux->flags & CLK_MUX_INDEX_BIT)
69 if (mux->flags & CLK_MUX_INDEX_ONE)
73 if (mux->flags & CLK_MUX_HIWORD_MASK) {
74 val = mux->mask << (mux->shift + 16);
76 val = ti_clk_ll_ops->clk_readl(&mux->reg);
77 val &= ~(mux->mask << mux->shift);
79 val |= index << mux->shift;
80 ti_clk_ll_ops->clk_writel(val, &mux->reg);
81 ti_clk_latch(&mux->reg, mux->latch);
87 * clk_mux_save_context - Save the parent selcted in the mux
90 * Save the parent mux value.
94 struct clk_omap_mux *mux = to_clk_omap_mux(hw);
96 mux->saved_parent = ti_clk_mux_get_parent(hw);
101 * clk_mux_restore_context - Restore the parent in the mux
104 * Restore the saved parent mux value.
108 struct clk_omap_mux *mux = to_clk_omap_mux(hw);
110 ti_clk_mux_set_parent(hw, mux->saved_parent);
127 struct clk_omap_mux *mux;
131 /* allocate the mux */
132 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
133 if (!mux)
134 return ERR_PTR(-ENOMEM);
143 memcpy(&mux->reg, reg, sizeof(*reg));
144 mux->shift = shift;
145 mux->mask = mask;
146 mux->latch = latch;
147 mux->flags = clk_mux_flags;
148 mux->table = table;
149 mux->hw.init = &init;
151 clk = of_ti_clk_register(node, &mux->hw, name);
154 kfree(mux);
160 * of_mux_clk_setup - Setup function for simple mux rate clock
175 s32 latch = -EINVAL;
180 pr_err("mux-clock %pOFn must have parents\n", node);
194 of_property_read_u32(node, "ti,latch-bit", &latch);
196 if (of_property_read_bool(node, "ti,index-starts-at-one"))
199 if (of_property_read_bool(node, "ti,set-rate-parent"))
202 /* Generate bit-mask based on parent info */
205 mask--;
207 mask = (1 << fls(mask)) - 1;
220 CLK_OF_DECLARE(mux_clk, "ti,mux-clock", of_mux_clk_setup);
224 struct clk_omap_mux *mux;
230 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
231 if (!mux)
232 return ERR_PTR(-ENOMEM);
234 mux->shift = setup->bit_shift;
235 mux->latch = -EINVAL;
237 mux->reg.index = setup->module;
238 mux->reg.offset = setup->reg;
240 if (setup->flags & CLKF_INDEX_STARTS_AT_ONE)
241 mux->flags |= CLK_MUX_INDEX_ONE;
243 num_parents = setup->num_parents;
245 mux->mask = num_parents - 1;
246 mux->mask = (1 << fls(mux->mask)) - 1;
248 return &mux->hw;
253 struct clk_omap_mux *mux;
256 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
257 if (!mux)
260 if (ti_clk_get_reg_addr(node, 0, &mux->reg))
263 mux->shift = mux->reg.bit;
265 if (of_property_read_bool(node, "ti,index-starts-at-one"))
266 mux->flags |= CLK_MUX_INDEX_ONE;
275 mux->mask = num_parents - 1;
276 mux->mask = (1 << fls(mux->mask)) - 1;
278 if (!ti_clk_add_component(node, &mux->hw, CLK_COMPONENT_TYPE_MUX))
282 kfree(mux);
284 CLK_OF_DECLARE(ti_composite_mux_clk_setup, "ti,composite-mux-clock",