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/linux/Documentation/devicetree/bindings/mtd/
H A Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
11 The corresponding address lines are used to select the chip.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
[all …]
/linux/drivers/pwm/
H A Dpwm-bcm-iproc.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #define IPROC_PWM_PRESCALE_SHIFT(ch) ((3 - (ch)) * \
41 static inline struct iproc_pwmc *to_iproc_pwmc(struct pwm_chip *chip) in to_iproc_pwmc() argument
43 return pwmchip_get_drvdata(chip); in to_iproc_pwmc()
50 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_enable()
52 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_enable()
62 value = readl(ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_disable()
64 writel(value, ip->base + IPROC_PWM_CTRL_OFFSET); in iproc_pwmc_disable()
70 static int iproc_pwmc_get_state(struct pwm_chip *chip, struct pwm_device *pwm, in iproc_pwmc_get_state() argument
73 struct iproc_pwmc *ip = to_iproc_pwmc(chip); in iproc_pwmc_get_state()
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/linux/Documentation/devicetree/bindings/mfd/
H A Dretu.txt1 * Device tree bindings for Nokia Retu and Tahvo multi-function device
3 Retu and Tahvo are a multi-function devices found on Nokia Internet
4 Tablets (770, N800 and N810). The Retu chip provides watchdog timer
5 and power button control functionalities while Tahvo chip provides
9 - compatible: "nokia,retu" or "nokia,tahvo"
10 - reg: Specifies the CBUS slave address of the ASIC chip
11 - interrupts: The interrupt line the device is connected to
16 compatible = "i2c-cbus-gpio";
20 interrupt-parent = <&gpio4>;
/linux/drivers/usb/typec/tcpm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 tristate "USB Type-C Port Controller Manager"
9 The Type-C Port Controller Manager provides a USB PD and USB Type-C
10 state machine for use with Type-C Port Controllers.
15 tristate "Type-C Port Controller Interface driver"
19 Type-C Port Controller driver for TCPCI-compliant controller.
24 tristate "Richtek RT1711H Type-C chip driver"
26 Richtek RT1711H Type-C chip driver that works with
27 Type-C Port Controller Manager to provide USB PD and USB
28 Type-C functionalities.
[all …]
/linux/arch/mips/include/asm/sibyte/
H A Dsb1250_defs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 * 'long long' (64-bit integer) support.
33 * for chip features only present in certain chip revisions.
35 * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
43 * Generate defines only for that revision of chip.
45 * #if SIBYTE_HDR_FEATURE(chip,pass)
48 * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
52 * Note that there is no implied ordering between chip types.
54 * Note also that 'chip' and 'pass' must textually exactly
59 * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
/linux/drivers/net/dsa/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 tristate "DSA mock-up Ethernet switch chip support"
24 This enables support for a fake mock-up switch chip which
44 switch chips. Multi-chip module MT7530 in MT7621AT, MT7621DAT,
45 MT7621ST and MT7623AI SoCs, and built-in switch in MT7988 SoC are
55 chips which are connected via MDIO, as well as multi-chip
65 This enables support for the built-in Ethernet switch found
72 tristate "Marvell 88E6060 ethernet switch chip support"
76 chip.
111 tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in I2C managed mode"
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/linux/drivers/char/tpm/
H A Dtpm_i2c_infineon.c1 // SPDX-License-Identifier: GPL-2.0-only
62 /* In addition to the data itself, the buffer must fit the 7-bit I2C
66 struct tpm_chip *chip; member
74 * iic_tpm_read() - read from TPM register
80 * buffer (little-endian format, i.e. first byte is put into buffer[0]).
82 * NOTE: TPM is big-endian for multi-byte values. Multi-byte
88 * The i2c_smbus* functions do not work for this chip.
90 * Return -EIO on error, 0 on success.
96 .addr = tpm_dev.client->addr, in iic_tpm_read()
101 .addr = tpm_dev.client->addr, in iic_tpm_read()
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/linux/Documentation/sound/cards/
H A Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
11 CM8x38 chip can use ADC as the second DAC so that two different stereo
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
60 4/6 Multi-Channel Playback
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/linux/drivers/net/wireless/ti/wl12xx/
H A Dwl12xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 /* WiLink 6/7 chip IDs */
19 /* FW chip version for wl127x */
21 /* minimum single-role FW version for wl127x */
26 /* minimum multi-role FW version for wl127x */
32 /* FW chip version for wl128x */
34 /* minimum single-role FW version for wl128x */
39 /* minimum multi-role FW version for wl128x */
138 /* Cumulative counter of total released mem blocks since FW-reset */
/linux/drivers/leds/
H A Dleds-lp55xx-common.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Derived from leds-lp5521.c, leds-lp5523.c
15 #include <linux/led-class-multicolor.h>
116 * @reg_op_mode : Chip specific OP MODE reg addr
117 * @engine_busy : Chip specific engine busy
119 * @reset : Chip specific reset command
120 * @enable : Chip specific enable command
121 * @prog_mem_base : Chip specific base reg address for chip SMEM programming
122 * @reg_led_pwm_base : Chip specific base reg address for LED PWM conf
123 * @reg_led_current_base : Chip specific base reg address for LED current conf
[all …]
/linux/sound/pci/
H A Dvia82xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Tjeerd.Mulder <Tjeerd.Mulder@fujitsu-siemens.com>
16 * - use the DSX channels for the first pcm playback.
19 * multi-channel playback is assigned to the second device
21 * - support the secondary capture (on VIA8233/C,8235)
22 * - SPDIF support
26 * the card config of alsa-lib will assign the correct
28 * - clean up the code, separate low-level initialization
32 * - Optimize position calculation for the 823x chips.
64 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
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/linux/Documentation/devicetree/bindings/powerpc/nintendo/
H A Dwii.txt11 - model : Should be "nintendo,wii"
12 - compatible : Should be "nintendo,wii"
16 This node represents the multi-function "Hollywood" chip, which packages
21 - compatible : Should be "nintendo,hollywood"
30 - compatible : should be "nintendo,hollywood-vi","nintendo,flipper-vi"
31 - reg : should contain the VI registers location and length
32 - interrupts : should contain the VI interrupt
41 - compatible : should be "nintendo,hollywood-pi","nintendo,flipper-pi"
42 - reg : should contain the PI registers location and length
46 Represents the "Flipper" interrupt controller within the "Hollywood" chip.
[all …]
H A Dgamecube.txt7 This node represents the multi-function "Flipper" chip, which packages
12 - compatible : Should be "nintendo,flipper"
21 - compatible : should be "nintendo,flipper-vi"
22 - reg : should contain the VI registers location and length
23 - interrupts : should contain the VI interrupt
32 - compatible : should be "nintendo,flipper-pi"
33 - reg : should contain the PI registers location and length
37 Represents the interrupt controller within the "Flipper" chip.
43 - compatible : should be "nintendo,flipper-pic"
52 - compatible : should be "nintendo,flipper-dsp"
[all …]
/linux/drivers/isdn/hardware/mISDN/
H A Dhfc_multi_8xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_outb_embsd()
26 writeb(reg, hc->xhfc_memaddr); in HFC_outb_embsd()
27 hc->immap->im_ioport.iop_padat &= ~(PA_XHFC_A0); in HFC_outb_embsd()
28 writeb(val, hc->xhfc_memdata); in HFC_outb_embsd()
37 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_inb_embsd()
38 writeb(reg, hc->xhfc_memaddr); in HFC_inb_embsd()
39 hc->immap->im_ioport.iop_padat &= ~(PA_XHFC_A0); in HFC_inb_embsd()
40 return readb(hc->xhfc_memdata); in HFC_inb_embsd()
49 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_inw_embsd()
[all …]
/linux/Documentation/hwmon/
H A Dpxe1610.rst10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 -----------
36 PXE1610/PXE1110 are Multi-rail/Multiphase Digital Controllers
39 - Intel VR13 DC-DC converter specifications.
40 - Intel SVID protocol.
44 - Servers, Workstations, and High-end desktops
46 PXM1310 is a Multi-rail Controller and it is compliant to
48 - Intel VR13 DC-DC converter specifications.
[all …]
H A Ducd9200.rst11 Addresses scanned: -
15 - http://focus.ti.com/lit/ds/symlink/ucd9220.pdf
16 - http://focus.ti.com/lit/ds/symlink/ucd9222.pdf
17 - http://focus.ti.com/lit/ds/symlink/ucd9224.pdf
18 - http://focus.ti.com/lit/ds/symlink/ucd9240.pdf
19 - http://focus.ti.com/lit/ds/symlink/ucd9244.pdf
20 - http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
21 - http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
23 Author: Guenter Roeck <linux@roeck-us.net>
27 -----------
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/linux/drivers/mfd/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 bool "Altera Arria10 DevKit System Resource chip"
41 Support for the Altera Arria10 DevKit MAX5 System Resource chip
57 tristate "Active-semi ACT8945A"
62 Support for the ACT8945A PMIC from Active-semi. This device
63 features three step-down DC/DC converters and four low-dropout
79 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
82 called sun4i-gpadc.
113 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
144 over at91-usart-serial driver and usart-spi-driver. Only one function
[all …]
H A Dtps6507x.c2 * tps6507x.c -- TPS6507x chip family multi-function driver
11 * Using code from wm831x-*.c, wm8400-core, Wolfson Microelectronics PLC.
13 * For licencing details see kernel-base/COPYING
28 .name = "tps6507x-pmic",
31 .name = "tps6507x-ts",
39 struct i2c_client *i2c = tps6507x->i2c_client; in tps6507x_i2c_read_device()
44 xfer[0].addr = i2c->addr; in tps6507x_i2c_read_device()
50 xfer[1].addr = i2c->addr; in tps6507x_i2c_read_device()
55 ret = i2c_transfer(i2c->adapter, xfer, 2); in tps6507x_i2c_read_device()
59 ret = -EIO; in tps6507x_i2c_read_device()
[all …]
/linux/sound/parisc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 # ALSA PA-RISC drivers
9 Support for GSC sound devices on PA-RISC architectures.
14 tristate "Harmony/Vivace sound chip"
18 chip found in most GSC-based PA-RISC workstations. It's frequently
19 provided as part of the Lasi multi-function IC.
/linux/Documentation/devicetree/bindings/spi/
H A Dsprd,spi-adi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
16 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
21 48 hardware channels to access analog chip. For 2 software read/write channels,
[all …]
/linux/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/
H A Dkconfig.rst1 .. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
34 | built-in into mlx5_core.ko.
39 …g (DCB) Support <https://enterprise-support.nvidia.com/s/article/howto-auto-config-pfc-and-ets-on-
53 | Flow-based classifiers, such as those registered through
54 | `tc-flower(8)`, are processed by the device, rather than the
61 | Enables Hardware-accelerated receive flow steering (arfs) support, and ntuple filtering.
62 | https://enterprise-support.nvidia.com/s/article/howto-configure-arfs-on-connectx-4
67 | Enables :ref:`IPSec XFRM cryptography-offload acceleration <xfrm_device>`.
72 | Build support for MACsec cryptography-offload acceleration in the NIC.
83 | TLS cryptography-offload acceleration.
[all …]
/linux/Documentation/userspace-api/gpio/
H A Dchardev.rst1 .. SPDX-License-Identifier: GPL-2.0
18 Read Documentation/driver-api/gpio/drivers-on-gpio.rst to avoid reinventing
21 Similarly, for multi-function lines there may be other subsystems, such as
23 Documentation/driver-api/pwm.rst, Documentation/w1/index.rst etc, that
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
31 .. _gpio-v2-chip:
33 Chip chapter
36 The Chip represents a single GPIO chip and is exposed to userspace using device
39 Each chip supports a number of GPIO lines,
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/linux/drivers/irqchip/
H A Dirq-mips-cpu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 * may be used for IPIs in multi-threaded single-core systems.
42 set_c0_status(IE_SW0 << d->hwirq); in unmask_mips_irq()
48 clear_c0_status(IE_SW0 << d->hwirq); in mask_mips_irq()
71 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_startup()
84 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_ack()
141 irq = fls(pending) - 1; in plat_irq_dispatch()
155 struct irq_chip *chip; in mips_cpu_intc_map() local
159 chip = &mips_mt_cpu_irq_controller; in mips_cpu_intc_map()
161 chip = &mips_cpu_irq_controller; in mips_cpu_intc_map()
[all …]
/linux/drivers/gpio/
H A Dgpio-twl6040.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Access to GPOs on TWL6040 chip
23 static int twl6040gpo_get(struct gpio_chip *chip, unsigned offset) in twl6040gpo_get() argument
25 struct twl6040 *twl6040 = dev_get_drvdata(chip->parent->parent); in twl6040gpo_get()
35 static int twl6040gpo_get_direction(struct gpio_chip *chip, unsigned offset) in twl6040gpo_get_direction() argument
40 static int twl6040gpo_direction_out(struct gpio_chip *chip, unsigned offset, in twl6040gpo_direction_out() argument
47 static void twl6040gpo_set(struct gpio_chip *chip, unsigned offset, int value) in twl6040gpo_set() argument
49 struct twl6040 *twl6040 = dev_get_drvdata(chip->parent->parent); in twl6040gpo_set()
75 /*----------------------------------------------------------------------*/
79 struct device *twl6040_core_dev = pdev->dev.parent; in gpo_twl6040_probe()
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