| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | fsl-upm-nand.txt | 4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
11 The corresponding address lines are used to select the chip.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | retu.txt | 1 * Device tree bindings for Nokia Retu and Tahvo multi-function device
3 Retu and Tahvo are a multi-function devices found on Nokia Internet
4 Tablets (770, N800 and N810). The Retu chip provides watchdog timer
5 and power button control functionalities while Tahvo chip provides
9 - compatible: "nokia,retu" or "nokia,tahvo"
10 - reg: Specifies the CBUS slave address of the ASIC chip
11 - interrupts: The interrupt line the device is connected to
16 compatible = "i2c-cbus-gpio";
20 interrupt-parent = <&gpio4>;
|
| H A D | max14577.txt | 1 Maxim MAX14577/77836 Multi-Function Device
3 MAX14577 is a Multi-Function Device with Micro-USB Interface Circuit, Li+
13 - compatible : Must be "maxim,max14577" or "maxim,max77836".
14 - reg : I2C slave address for the max14577 chip (0x25 for max14577/max77836)
15 - interrupts : IRQ line for the chip.
19 - charger :
22 - compatible : "maxim,max14577-charger"
23 or "maxim,max77836-charger"
24 - maxim,fast-charge-uamp : Current in uA for Fast Charge;
26 - for max14577: 90000 - 950000;
[all …]
|
| H A D | max77686.txt | 1 Maxim MAX77686 multi-function device
3 MAX77686 is a Multifunction device with PMIC, RTC and Charger on chip. It is
10 Bindings for the built-in 32k clock generator block and
15 - compatible : Must be "maxim,max77686";
16 - reg : Specifies the i2c slave address of PMIC block.
17 - interrupts : This i2c device has an IRQ line connected to the main SoC.
23 interrupt-parent = <&wakeup_eint>;
|
| H A D | hi6421.txt | 1 * HI6421 Multi-Functional Device (MFD), by HiSilicon Ltd.
4 - compatible : One of the following chip-specific strings:
5 "hisilicon,hi6421-pmic";
6 "hisilicon,hi6421v530-pmic";
7 - reg : register range space of hi6421;
9 Supported Hi6421 sub-devices include:
12 ------ --------- ------------ -----------
20 compatible = "hisilicon,hi6421-pmic";
26 regulator-name = "VOUT0";
27 regulator-min-microvolt = <2850000>;
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/powerpc/nintendo/ |
| H A D | wii.txt | 11 - model : Should be "nintendo,wii"
12 - compatible : Should be "nintendo,wii"
16 This node represents the multi-function "Hollywood" chip, which packages
21 - compatible : Should be "nintendo,hollywood"
30 - compatible : should be "nintendo,hollywood-vi","nintendo,flipper-vi"
31 - re
[all...] |
| H A D | gamecube.txt | 7 This node represents the multi-function "Flipper" chip, which packages
12 - compatible : Should be "nintendo,flipper"
21 - compatible : should be "nintendo,flipper-vi"
22 - reg : should contain the VI registers location and length
23 - interrupts : should contain the VI interrupt
32 - compatible : should be "nintendo,flipper-p
[all...] |
| /freebsd/sys/dev/ath/ath_hal/ar9001/ |
| H A D | ar9160_attach.c | 1 /*-
2 * SPDX-License-Identifier: ISC
31 static const HAL_PERCAL_DATA ar9160_iq_cal = { /* multi sample */
38 static const HAL_PERCAL_DATA ar9160_adc_gain_cal = { /* multi sample */
45 static const HAL_PERCAL_DATA ar9160_adc_dc_cal = { /* multi sample */
67 .totalSizeDesired = { -55, -55, -55, -55, -62 }, in ar9160AniSetup()
68 .coarseHigh = { -14, -14, -14, -14, -12 }, in ar9160AniSetup()
69 .coarseLow = { -64, -64, -64, -64, -70 }, in ar9160AniSetup()
70 .firpwr = { -78, -78, -78, -78, -80 }, in ar9160AniSetup()
85 AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL); in ar9160AniSetup()
[all …]
|
| /freebsd/sys/dev/sound/pci/ |
| H A D | envy24ht.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 /* -------------------------------------------------------------------- */
37 #define ENVY24HT_PCIR_MT 0x14 /* Multi-Track I/O Base Address */
42 #define ENVY24HT_CCS_CTL_RESET 0x80 /* Entire Chip soft reset */
45 #define ENVY24HT_CCS_IMASK_PMT 0x10 /* Professional Multi-track */
65 #define ENVY24HT_CCSM_SCFG_MPU 0x20 /* 0(not implemented)/1(1) MPU-401 UART */
66 #define ENVY24HT_CCSM_SCFG_ADC 0x0c /* 1-2 stereo ADC connected, S/PDIF receiver connected */
67 #define ENVY24HT_CCSM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */
69 #define ENVY24HT_CCS_ACL 0x05 /* AC-Link Configuration Register */
[all …]
|
| H A D | envy24.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 /* -------------------------------------------------------------------- */
40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */
48 #define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */
60 #define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */
67 /* 10: from external clock synthesizer chip */
68 #define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */
71 #define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */
72 #define PCIM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
4 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
19 the analog chip address where user want to access by hardware components.
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
34 - compatible: Should be "sprd,sc9860-adi".
[all …]
|
| H A D | sprd,spi-adi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
16 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
21 48 hardware channels to access analog chip. For 2 software read/write channels,
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/security/tpm/ |
| H A D | tpm_tis_mmio.txt | 3 The TCG defines multi vendor standard for accessing a TPM chip, this
12 - compatible: should contain a string below for the chip, followed by
13 "tcg,tpm-tis-mmio". Valid chip strings are:
15 - reg: The location of the MMIO registers, should be at least 0x5000 bytes
16 - interrupts: An optional interrupt indicating command completion.
21 compatible = "atmel,at97sc3204", "tcg,tpm-tis-mmio";
23 interrupt-parent = <&EIC0>;
|
| /freebsd/share/man/man4/ |
| H A D | iicbus.4 | 41 system provides a uniform, modular and architecture-independent
49 easy way to connect a CPU to peripheral chips in a TV-set.
57 is a CPU, LCD driver, memory, or complex function chip.
60 Obviously an LCD driver is only a receiver, while a memory or I/O chip can
65 The BUS MASTER is the chip issuing the commands on the BUS.
71 As mentioned before, the IC bus is a Multi-MASTER BUS.
77 .Bl -column "Device drivers" -compact
89 8-bit characters they write to the bus according to the I2C protocol.
92 bidirectional communications, thanks to the multi-master capabilities of the
97 .Bl -column "Interface drivers" -compact
[all …]
|
| H A D | ahc.4 | 37 .Bd -ragged -offset indent
48 .Bd -literal -offset indent
64 .Tn SCSI-Select
72 For systems that store non-volatile settings in a system specific manner
78 many chip-down motherboard configurations.
86 by a particular chip, may be disabled in a particular motherboard or card
88 .Bd -ragged -offset indent
89 .Bl -column "aic7895CX" "MIPSX" "PCI/64X" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X"
90 .It Em "Chip" Ta "MIPS" Ta "Bus" Ta "MaxSync" Ta "MaxWidth" Ta "SCBs" Ta "Features"
106 .Bl -enum -compact
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | maxim,max77686.txt | 4 multi-function device. More information can be found in MFD DT binding
12 dt-bindings/clock/maxim,max77686.h.
17 dt-bindings/clock/maxim,max77802.h.
21 dt-bindings/clock/maxim,max77620.h.
23 Following properties should be presend in main device node of the MFD chip.
27 - #clock-cells: from common clock binding; shall be set to 1.
30 - clock-output-names: From common clock binding.
34 - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620)
35 - 1: 32khz_cp clock (max77686, max77802),
36 - 2: 32khz_pmic clock (max77686).
[all …]
|
| /freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/ |
| H A D | pipeline.json | 10 "BriefDescription": "Number of I-ERAT reloads"
25 …"BriefDescription": "Finish stall because the NTF instruction was a multi-cycle instruction issued…
30 …aded either shared or modified data from another core's L2/L3 on the same chip due to a marked loa…
35 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
80 …ed into the TLB with Modified (M) data from another core's L2 on the same chip due to a marked dat…
90 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different…
95 …ed into the TLB with Modified (M) data from another core's L2 on the same chip due to a data side …
135 …"BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L…
160 …B either shared or modified data from another core's L2/L3 on a different chip (remote or distant)…
190 …eloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as…
[all …]
|
| H A D | translation.json | 15 …ache was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand loa…
20 "BriefDescription": "Double-Precion or Quad-Precision instruction completed"
25 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the …
35 …o the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as…
60 …the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
75 … TLB either shared or modified data from another core's L2/L3 on the same chip due to a instructio…
80 …ache was reloaded with Shared (S) data from another core's L2 on the same chip due to an instructi…
95 …he was reloaded with Modified (M) data from another core's L2 on the same chip due to a demand loa…
100 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same…
130 "BriefDescription": "Demand LD - L2 Miss (not L2 hit)"
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | mediatek,gce-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Houlong Wei <houlong.wei@mediatek.com>
13 The Global Command Engine (GCE) is an instruction based, multi-threaded,
14 single-core command dispatcher for MediaTek hardware. The Command Queue
18 We use mediatek,gce-mailbox.yaml to define the properties for CMDQ mailbox
28 mediatek,gce-events:
32 The property mediatek,gce-events is used to obtain the event IDs.
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | imx-weim.txt | 5 wireless and mobile applications that use low-power technology.
11 - compatible: Should contain one of the following:
12 "fsl,imx1-weim"
13 "fsl,imx27-weim"
14 "fsl,imx51-weim"
15 "fsl,imx50-weim"
16 "fsl,imx6q-weim"
17 - reg: A resource specifier for the register space
19 - clocks: the clock, see the example below.
20 - #address-cells: Must be set to 2 to allow memory address translation
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | apm-xgene-phy.txt | 1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
19 Two set of 3-tuple setting for each (up to 3)
22 - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | adi,ad7944.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of pin-compatible single channel differential analog to digital
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad7944
27 - adi,ad7985
28 - adi,ad7986
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | xlnx,zynqmp-ocmc-1.0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynqmp OCM(On-Chip Memory) Controller
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
11 - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
14 The OCM supports 64-bit wide ECC functionality to detect multi-bit errors
15 and recover from a single-bit memory fault.On a write, if all bytes are
17 the write-data that is written into the data RAM. If one or more bytes are
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | coda.txt | 1 Chips&Media Coda multi-standard codec IP
8 - compatible : should be "fsl,<chip>-src" for i.MX SoCs:
9 (a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
10 (b) "fsl,imx51-vpu" for CodaHx4 present in i.MX51
11 (c) "fsl,imx53-vpu" for CODA7541 present in i.MX53
12 (d) "fsl,imx6q-vpu" for CODA960 present in i.MX6q
13 - reg: should be register base and length as documented in the
15 - interrupts : Should contain the VPU interrupt. For CODA960,
17 - clocks : Should contain the ahb and per clocks, in the order
18 determined by the clock-names property.
[all …]
|