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/linux/sound/soc/generic/
H A Daudio-graph-card2-custom-sample.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * audio-graph-card2-custom-sample.dtsi
8 * This sample indicates how to use audio-graph-card2 and its
9 * custom driver. "audio-graph-card2-custom-sample" is the custome driver
10 * which is using audio-graph-card2.
15 * #include "../../../../../sound/soc/generic/audio-graph-card2-custom-sample.dtsi"
23 * "compatible" on each test-component. see below
26 * - compatible = "test-cpu";
27 * + compatible = "test-cpu-verbose";
32 * - compatible = "test-codec";
[all …]
/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrx_dap_fasi.h2 Copyright (c), 2004-2005,2007-2010 Trident Microsystems, Inc.
48 /*-------- compilation control switches --------------------------------------*/
53 /*-------- Required includes -------------------------------------------------*/
57 /*-------- Defines, configuring the API --------------------------------------*/
60 * Allowed address formats
66 * The DAP FASI offers long address format (4 bytes) and short address format
98 #error At least one of short- or long-addressing format must be allowed.
103 * Single/master multi master setting
106 * Comments about SINGLE MASTER/MULTI MASTER modes:
113 * + multi master mode means use of repeated starts
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-turris-omnia.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/leds/common.h>
16 #include "armada-385.dtsi"
20 compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380";
23 stdout-path = &uart0;
[all …]
/linux/Documentation/devicetree/bindings/leds/
H A Donnn,ncp5623.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ON Semiconductor NCP5623 multi-LED Driver
10 - Abdel Alkuor <alkuor@gmail.com>
14 https://www.onsemi.com/pdf/datasheet/ncp5623-d.pdf
19 - onnn,ncp5623
24 multi-led:
26 $ref: leds-class-multicolor.yaml#
30 "#address-cells":
[all …]
H A Dleds-lp50xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp50xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Davis <afd@ti.com>
13 The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into
27 - ti,lp5009
28 - ti,lp5012
29 - ti,lp5018
30 - ti,lp5024
[all …]
H A Dcznic,turris-omnia-leds.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/cznic,turris-omnia-leds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Behún <kabel@kernel.org>
20 const: cznic,turris-omnia-leds
23 description: I2C slave address of the microcontroller.
26 "#address-cells":
29 "#size-cells":
33 "^multi-led@[0-9a-b]$":
[all …]
H A Dkinetic,ktd202x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - André Apitzsch <git@apitzsch.eu>
16 https://www.kinet-ic.com/uploads/KTD2026-7-04h.pdf
21 - kinetic,ktd2026
22 - kinetic,ktd2027
27 vin-supply:
30 vio-supply:
31 description: Regulator providing power for pull-up of the I/O lines.
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-echo.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
14 compatible = "amazon,omap3-echo", "ti,omap3630", "ti,omap3";
18 cpu0-supply = <&vdd1_reg>;
28 compatible = "regulator-fixed";
29 regulator-name = "vcc5v";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
11 The corresponding address lines are used to select the chip.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
[all …]
H A Dmxic-nand.txt2 -------------------------------------------------
5 - compatible: should be "mxic,multi-itfc-v009-nand-controller"
6 - reg: should contain 1 entry for the registers
7 - #address-cells: should be set to 1
8 - #size-cells: should be set to 0
9 - interrupts: interrupt line connected to this raw NAND controller
10 - clock-names: should contain "ps", "send" and "send_dly"
11 - clocks: should contain 3 phandles for the "ps", "send" and
15 - children nodes represent the available NAND chips.
17 See Documentation/devicetree/bindings/mtd/nand-controller.yaml
[all …]
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dkeystone-navigator-qmss.txt5 multi-core Navigator. QMSS consist of queue managers, packed-data structure
9 management of the packet queues. Packets are queued/de-queued by writing or
10 reading descriptor address to a particular memory mapped location. The PDSPs
20 - compatible : Must be "ti,keystone-navigator-qmss".
21 : Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC.
22 - clocks : phandle to the reference clock for this device.
23 - queue-range : <start number> total range of queue numbers for the device.
24 - linkram0 : <address size> for internal link ram, where size is the total
26 - linkram1 : <address size> for external link ram, where size is the total
27 external link ram entries. If the address is specified as "0"
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dplanar-apis.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _planar-apis:
6 Single- and multi-planar APIs
11 has to be addressed using more than one memory address, i.e. one pointer
12 per "plane". A plane is a sub-buffer of the current frame. For examples
15 Initially, V4L2 API did not support multi-planar buffers and a set of
17 constitute what is being referred to as the "multi-planar API".
20 depending on whether single- or multi-planar API is being used. An
22 corresponding buffer type to its ioctl calls. Multi-planar versions of
24 available multi-planar buffer types see enum
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-vegman.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
29 compatible = "shared-dma-pool";
36 record-size = <0x2000>;
37 console-size = <0x2000>;
[all …]
/linux/arch/powerpc/boot/dts/
H A Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
[all …]
/linux/Documentation/arch/s390/
H A Dpci.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Pierre Morel
17 -----------------------
28 ---------------
36 - /sys/kernel/debug/s390dbf/pci_msg/sprintf
56 - /sys/bus/pci/slots/XXXXXXXX/power
64 - function_id
67 - function_handle
68 Low-level identifier used for a configured PCI function.
71 - pchid
[all …]
/linux/arch/sh/mm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
12 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
15 On other systems (such as the SH-3 and 4) where an MMU exists,
26 On MMU-less systems, any of these page sizes can be selected
53 hex "Physical memory start address"
57 map the ROM starting at address zero. But the processor
60 The physical memory (RAM) start address will be automatically
89 bool "Support 32-bit physical addressing through PMB"
95 32-bits through the SH-4A PMB. If this is not set, legacy
96 29-bit physical addressing will be used.
[all …]
/linux/drivers/soc/fsl/qe/
H A Dqe_common.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
41 /* max address size we deal with */
57 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init()
60 np = of_find_node_by_name(NULL, "data-onl in cpm_muram_init()
[all...]
/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dcpm.txt10 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
11 - reg : A 48-byte region beginning with CPCR.
15 #address-cells = <1>;
16 #size-cells = <1>;
17 #interrupt-cells = <2>;
18 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
24 - fsl,cpm-command : This value is ORed with the opcode and command flag
27 - fsl,cpm-brg : Indicates which baud rate generator the device
32 - reg : Unless otherwise specified, the first resource represents the
36 * Multi-User RAM (MURAM)
[all …]
H A Dfsl,qe-muram.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-muram.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale QUICC Engine Multi-User RAM (MURAM)
10 - Frank Li <Frank.Li@nxp.com>
12 description: Multi-User RAM (MURAM)
17 - const: fsl,qe-muram
18 - const: fsl,cpm-muram
23 "#address-cells":
[all …]
/linux/Documentation/sound/cards/
H A Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
60 4/6 Multi-Channel Playback
61 --------------------------
[all …]
/linux/Documentation/devicetree/bindings/iio/chemical/
H A Dsciosense,ens160.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ScioSense ENS160 multi-gas sensor
10 - Gustavo Silva <gustavograzs@gmail.com>
13 Digital Multi-Gas Sensor for Monitoring Indoor Air Quality.
16 https://www.sciosense.com/wp-content/uploads/2023/12/ENS160-Datasheet.pdf
21 - sciosense,ens160
29 vdd-supply: true
30 vddio-supply: true
[all …]
/linux/drivers/isdn/hardware/mISDN/
H A Dhfc_multi_8xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_outb_embsd()
26 writeb(reg, hc->xhfc_memaddr); in HFC_outb_embsd()
27 hc->immap->im_ioport.iop_padat &= ~(PA_XHFC_A0); in HFC_outb_embsd()
28 writeb(val, hc->xhfc_memdata); in HFC_outb_embsd()
37 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_inb_embsd()
38 writeb(reg, hc->xhfc_memaddr); in HFC_inb_embsd()
39 hc->immap->im_ioport.iop_padat &= ~(PA_XHFC_A0); in HFC_inb_embsd()
40 return readb(hc->xhfc_memdata); in HFC_inb_embsd()
49 hc->immap->im_ioport.iop_padat |= PA_XHFC_A0; in HFC_inw_embsd()
[all …]
/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif_client.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
27 * Minimum PB = Base Pages + (NUM_TE_PIPES-1)*16K + (NUM_VCE_PIPES-1)*64K +
30 * Maximum PB size must ensure that no PM address space can be fully used,
31 * because if the full address space was used it would wrap and corrupt itself.
35 * (Minimum PB + Maximum PB) < ALIST PM address space size (16GB)
36 * (Minimum PB + Maximum PB) < TE PM address space size (16GB) / NUM_TE_PIPES
37 * (Minimum PB + Maximum PB) < VCE PM address space size (16GB) / NUM_VCE_PIPES
40 * of 4GB minus the Minimum PB. For convenience we take the smaller power-of-2
51 /* Use single core in a multi core setup. */
58 /* Use single core in a multi core setup. */
[all …]
/linux/Documentation/devicetree/bindings/arm/freescale/
H A Dm4if.txt1 * Freescale Multi Master Multi Memory Interface (M4IF) module
4 - compatible : Should be "fsl,imx51-m4if"
5 - reg : Address and length of the register set for the device
10 compatible = "fsl,imx51-m4if";

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