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Searched +full:mt8195 +full:- +full:memory +full:- +full:port (Results 1 – 17 of 17) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dmediatek,mt8195-jpegenc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
17 const: mediatek,mt8195-jpgenc
19 power-domains:
25 Points to the respective IOMMU block with master port as argument, see
29 "#address-cells":
32 "#size-cells":
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H A Dmediatek,mt8195-jpegdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
17 const: mediatek,mt8195-jpgdec
19 power-domains:
25 Points to the respective IOMMU block with master port as argument, see
29 "#address-cells":
32 "#size-cells":
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H A Dmediatek,mdp3-rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Read Direct Memory Access
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
14 MediaTek Read Direct Memory Access(RDMA) component used to do read DMA.
24 - enum:
25 - mediatek,mt8183-mdp3-rdma
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H A Dmediatek,vcodec-subdev-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-subde
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H A Dmediatek,vcodec-encoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 - items:
21 - enum:
22 - mediatek,mt8173-vcodec-enc-vp8
23 - mediatek,mt8173-vcodec-enc
24 - mediatek,mt8183-vcodec-enc
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H A Dmediatek-vcodec.txt7 - compatible : must be one of the following string:
8 "mediatek,mt8173-vcodec-enc-vp8" for mt8173 vp8 encoder.
9 "mediatek,mt8173-vcodec-enc" for mt8173 avc encoder.
10 "mediatek,mt8183-vcodec-enc" for MT8183 encoder.
11 "mediatek,mt8173-vcodec-dec" for MT8173 decoder.
12 "mediatek,mt8192-vcodec-enc" for MT8192 encoder.
13 "mediatek,mt8183-vcodec-dec" for MT8183 decoder.
14 "mediatek,mt8195-vcodec-enc" for MT8195 encoder.
15 - reg : Physical base address of the video codec registers and length of
16 memory mapped region.
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/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,mdp-rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 The MediaTek MDP RDMA stands for Read Direct Memory Access.
15 It provides real time data to the back-end panel driver, such as DSI,
24 const: mediatek,mt8195-vdo1-rdma
32 power-domains:
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H A Dmediatek,ethdr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Dmediatek,ovl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 the memory.
24 - enum:
25 - mediatek,mt2701-disp-ovl
26 - mediatek,mt8173-disp-ovl
27 - mediatek,mt8183-disp-ovl
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H A Dmediatek,rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Read Direct Memory Access
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek Read Direct Memory Access(RDMA) component used to read the
15 data into DMA. It provides real time data to the back-end panel
26 - enum:
27 - mediatek,mt2701-disp-rdma
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dmediatek,smi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.
22 register which control the iommu port is at each larb's register base. But
31 - enum:
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8395-radxa-nio-12l.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include "mt8195.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
13 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
14 #include <dt-bindings/spmi/spmi.h>
15 #include <dt-bindings/usb/pd.h>
19 chassis-type = "embedded";
20 compatible = "radxa,nio-12l", "mediatek,mt8395", "mediatek,mt8195";
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H A Dmt8395-kontron-3-5-sbc-i1200.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
9 #include "mt8195.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
16 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
17 #include <dt-bindings/spmi/spmi.h>
20 model = "Kontron 3.5\"-SBC-i1200";
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H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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H A Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
8 #include "mt8195.dtsi"
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
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H A Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
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