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/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8188-clock.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt8188-clock.yaml#
7 title: MediaTek Functional Clock Controller for MT8188
25 - mediatek,mt8188-adsp-audio26m
26 - mediatek,mt8188-camsys
27 - mediatek,mt8188-camsys-rawa
28 - mediatek,mt8188-camsys-rawb
29 - mediatek,mt8188-camsys-yuva
30 - mediatek,mt8188-camsys-yuvb
31 - mediatek,mt8188-ccusys
32 - mediatek,mt8188-imgsys
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H A Dmediatek,mt8188-sys-clock.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt8188-sys-clock.yaml#
7 title: MediaTek System Clock Controller for MT8188
30 - mediatek,mt8188-apmixedsys
31 - mediatek,mt8188-infracfg-ao
32 - mediatek,mt8188-pericfg-ao
33 - mediatek,mt8188-topckgen
55 compatible = "mediatek,mt8188-topckgen", "syscon";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8188-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
7 title: MediaTek MT8188 Pin Controller
13 The MediaTek's MT8188 Pin controller is used to control SoC pins.
17 const: mediatek,mt8188-pinctrl
91 defined as macros in dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h
104 description: mt8188 pull down PUPD/R0/R1 type define value.
106 description: mt8188 pull down RSEL type define value.
108 description: mt8188 pull down RSEL type si unit value(ohm).
115 "MTK_PUPD_SET_R1R0_11" define in mt8188.
123 mt8188. It can also support resistance value(ohm) "75000" & "5000"
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/linux/sound/soc/mediatek/mt8188/
H A DMakefile4 snd-soc-mt8188-afe-y := \
5 mt8188-afe-clk.o \
6 mt8188-afe-pcm.o \
7 mt8188-audsys-clk.o \
8 mt8188-dai-adda.o \
9 mt8188-dai-etdm.o \
10 mt8188-dai-pcm.o
12 obj-$(CONFIG_SND_SOC_MT8188) += snd-soc-mt8188-afe.o
15 obj-$(CONFIG_SND_SOC_MT8188_MT6359) += mt8188-mt6359.o
H A Dmt8188-audsys-clk.c3 * mt8188-audsys-clk.c -- MediaTek 8188 audsys clock control
12 #include "mt8188-afe-common.h"
13 #include "mt8188-audsys-clk.h"
14 #include "mt8188-audsys-clkid.h"
15 #include "mt8188-reg.h"
/linux/drivers/clk/mediatek/
H A DMakefile113 obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o \
114 clk-mt8188-peri_ao.o clk-mt8188-infra_ao.o
115 obj-$(CONFIG_COMMON_CLK_MT8188_ADSP_AUDIO26M) += clk-mt8188-adsp_audio26m.o
116 obj-$(CONFIG_COMMON_CLK_MT8188_CAMSYS) += clk-mt8188-cam.o clk-mt8188-ccu.o
117 obj-$(CONFIG_COMMON_CLK_MT8188_IMGSYS) += clk-mt8188-img.o
118 obj-$(CONFIG_COMMON_CLK_MT8188_IMP_IIC_WRAP) += clk-mt8188-imp_iic_wrap.o
119 obj-$(CONFIG_COMMON_CLK_MT8188_IPESYS) += clk-mt8188-ipe.o
120 obj-$(CONFIG_COMMON_CLK_MT8188_MFGCFG) += clk-mt8188-mfg.o
121 obj-$(CONFIG_COMMON_CLK_MT8188_VDECSYS) += clk-mt8188-vdec.o
122 obj-$(CONFIG_COMMON_CLK_MT8188_VDOSYS) += clk-mt8188-vdo0.o clk-mt8188-vdo1.o
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H A DKconfig733 tristate "Clock driver for MediaTek MT8188"
739 This driver supports MediaTek MT8188 clocks.
742 tristate "Clock driver for MediaTek MT8188 adsp audio26m"
746 This driver supports MediaTek MT8188 adsp audio26m clocks.
749 tristate "Clock driver for MediaTek MT8188 camsys"
753 This driver supports MediaTek MT8188 camsys and camsys_raw clocks.
756 tristate "Clock driver for MediaTek MT8188 imgsys"
760 This driver supports MediaTek MT8188 imgsys and imgsys2 clocks.
763 tristate "Clock driver for MediaTek MT8188 imp_iic_wrap"
767 This driver supports MediaTek MT8188 I2C/I3C clocks.
[all …]
H A Dclk-mt8188-img.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
92 { .compatible = "mediatek,mt8188-imgsys", .data = &imgsys_main_desc },
93 { .compatible = "mediatek,mt8188-imgsys-wpe1", .data = &imgsys_wpe1_desc },
94 { .compatible = "mediatek,mt8188-imgsys-wpe2", .data = &imgsys_wpe2_desc },
95 { .compatible = "mediatek,mt8188-imgsys-wpe3", .data = &imgsys_wpe3_desc },
96 { .compatible = "mediatek,mt8188-imgsys1-dip-top", .data = &imgsys1_dip_top_desc },
97 { .compatible = "mediatek,mt8188-imgsys1-dip-nr", .data = &imgsys1_dip_nr_desc },
106 .name = "clk-mt8188-imgsys_main",
112 MODULE_DESCRIPTION("MediaTek MT8188 imgsys clocks driver");
H A Dclk-mt8188-cam.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
101 { .compatible = "mediatek,mt8188-camsys", .data = &cam_main_desc },
102 { .compatible = "mediatek,mt8188-camsys-rawa", .data = &cam_rawa_desc },
103 { .compatible = "mediatek,mt8188-camsys-rawb", .data = &cam_rawb_desc },
104 { .compatible = "mediatek,mt8188-camsys-yuva", .data = &cam_yuva_desc },
105 { .compatible = "mediatek,mt8188-camsys-yuvb", .data = &cam_yuvb_desc },
114 .name = "clk-mt8188-cam",
120 MODULE_DESCRIPTION("MediaTek MT8188 Camera clocks driver");
H A Dclk-mt8188-imp_iic_wrap.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
65 { .compatible = "mediatek,mt8188-imp-iic-wrap-c", .data = &imp_iic_wrap_c_desc },
66 { .compatible = "mediatek,mt8188-imp-iic-wrap-w", .data = &imp_iic_wrap_w_desc },
67 { .compatible = "mediatek,mt8188-imp-iic-wrap-en", .data = &imp_iic_wrap_en_desc },
76 .name = "clk-mt8188-imp_iic_wrap",
83 MODULE_DESCRIPTION("MediaTek MT8188 I2C Wrapper clocks driver");
H A Dclk-mt8188-vdec.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
76 { .compatible = "mediatek,mt8188-vdecsys-soc", .data = &vdec1_desc },
77 { .compatible = "mediatek,mt8188-vdecsys", .data = &vdec2_desc },
86 .name = "clk-mt8188-vdec",
93 MODULE_DESCRIPTION("MediaTek MT8188 Video Decoders clocks driver");
H A Dclk-mt8188-adsp_audio26m.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
36 { .compatible = "mediatek,mt8188-adsp-audio26m", .data = &adsp_audio26m_desc },
45 .name = "clk-mt8188-adsp_audio26m",
51 MODULE_DESCRIPTION("MediaTek MT8188 AudioDSP clocks driver");
H A Dclk-mt8188-ccu.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
35 { .compatible = "mediatek,mt8188-ccusys", .data = &ccu_desc },
44 .name = "clk-mt8188-ccu",
50 MODULE_DESCRIPTION("MediaTek MT8188 Camera Control Unit clocks driver");
H A Dclk-mt8188-ipe.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
37 { .compatible = "mediatek,mt8188-ipesys", .data = &ipe_desc },
46 .name = "clk-mt8188-ipe",
53 MODULE_DESCRIPTION("MediaTek MT8188 Image Processing Engine clocks driver");
H A Dclk-mt8188-venc.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
41 { .compatible = "mediatek,mt8188-vencsys", .data = &venc1_desc },
50 .name = "clk-mt8188-venc1",
56 MODULE_DESCRIPTION("MediaTek MT8188 Video Encoders clocks driver");
H A Dclk-mt8188-wpe.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
89 { .compatible = "mediatek,mt8188-wpesys", .data = &wpe_top_desc },
90 { .compatible = "mediatek,mt8188-wpesys-vpp0", .data = &wpe_vpp0_desc },
99 .name = "clk-mt8188-wpe",
105 MODULE_DESCRIPTION("MediaTek MT8188 Warp Engine clocks driver");
H A Dclk-mt8188-peri_ao.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
45 { .compatible = "mediatek,mt8188-pericfg-ao", .data = &peri_ao_desc },
54 .name = "clk-mt8188-peri_ao",
60 MODULE_DESCRIPTION("MediaTek MT8188 pericfg clocks driver");
H A Dclk-mt8188-mfg.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
34 { .compatible = "mediatek,mt8188-mfgcfg", .data = &mfgcfg_desc },
43 .name = "clk-mt8188-mfgcfg",
H A Dclk-mt8188-vdo0.c11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
93 { .name = "clk-mt8188-vdo0", .driver_data = (kernel_ulong_t)&vdo0_desc },
102 .name = "clk-mt8188-vdo0",
108 MODULE_DESCRIPTION("MediaTek MT8188 Video Output 0 clocks driver");
H A Dclk-mt8188-vpp0.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
100 { .name = "clk-mt8188-vpp0", .driver_data = (kernel_ulong_t)&vpp0_desc },
109 .name = "clk-mt8188-vpp0",
115 MODULE_DESCRIPTION("MediaTek MT8188 Video Processing Pipe 0 clocks driver");
H A Dclk-mt8188-vpp1.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
95 { .name = "clk-mt8188-vpp1", .driver_data = (kernel_ulong_t)&vpp1_desc },
104 .name = "clk-mt8188-vpp1",
110 MODULE_DESCRIPTION("MediaTek MT8188 Video Processing Pipe 1 clocks driver");
H A Dclk-mt8188-infra_ao.c7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
8 #include <dt-bindings/reset/mt8188-resets.h>
209 { .compatible = "mediatek,mt8188-infracfg-ao", .data = &infra_ao_desc },
218 .name = "clk-mt8188-infra_ao",
224 MODULE_DESCRIPTION("MediaTek MT8188 infracfg clocks driver");
/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml81 - mediatek,mt8188-iommu-vdo # generation two
82 - mediatek,mt8188-iommu-vpp # generation two
83 - mediatek,mt8188-iommu-infra # generation two
129 dt-binding/memory/mediatek,mt8188-memory-port.h for mt8188,
162 - mediatek,mt8188-iommu-vdo
163 - mediatek,mt8188-iommu-vpp
177 - mediatek,mt8188-iommu-vdo
178 - mediatek,mt8188-iommu-vpp
206 - mediatek,mt8188-iommu-infra
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,padding.yaml24 - mediatek,mt8188-disp-padding
68 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
69 #include <dt-bindings/power/mediatek,mt8188-power.h>
77 compatible = "mediatek,mt8188-disp-padding";
/linux/Documentation/devicetree/bindings/thermal/
H A Dmediatek,lvts-thermal.yaml23 - mediatek,mt8188-lvts-ap
24 - mediatek,mt8188-lvts-mcu
66 - mediatek,mt8188-lvts-ap
67 - mediatek,mt8188-lvts-mcu

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