Searched +full:mt8183 +full:- +full:ufshci (Results 1 – 3 of 3) sorted by relevance
3 UFS nodes are defined to describe on-chip UFS hardware macro.7 contain a phandle reference to UFS M-PHY node.10 - compatible : Compatible list, contains the following controller:11 "mediatek,mt8183-ufshci" for MediaTek UFS host controller12 present on MT8183 chipsets.13 "mediatek,mt8192-ufshci" for MediaTek UFS host controller15 - reg : Address and length of the UFS register set.16 - phys : phandle to m-phy.17 - clocks : List of phandle and clock specifier pairs.18 - clock-names : List of clock input name strings sorted in the same[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Stanley Chu <stanley.chu@mediatek.com>13 - $ref: ufs-common.yaml18 - mediatek,mt8183-ufshci19 - mediatek,mt8192-ufshci24 clock-names:26 - const: ufs34 vcc-supply: true[all …]
1 MediaTek Universal Flash Storage (UFS) M-PHY binding2 --------------------------------------------------------4 UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.5 Each UFS M-PHY node should have its own node.7 To bind UFS M-PHY with UFS host controller, the controller node should8 contain a phandle reference to UFS M-PHY node.10 Required properties for UFS M-PHY nodes:11 - compatible : Compatible list, contains the following controller:12 "mediatek,mt8183-ufsphy" for ufs phy14 - reg : Address and length of the UFS M-PHY register set.[all …]