1*c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*c9ccf3a3SEmmanuel Vadot%YAML 1.2 3*c9ccf3a3SEmmanuel Vadot--- 4*c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml# 5*c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c9ccf3a3SEmmanuel Vadot 7*c9ccf3a3SEmmanuel Vadottitle: Mediatek Universal Flash Storage (UFS) Controller 8*c9ccf3a3SEmmanuel Vadot 9*c9ccf3a3SEmmanuel Vadotmaintainers: 10*c9ccf3a3SEmmanuel Vadot - Stanley Chu <stanley.chu@mediatek.com> 11*c9ccf3a3SEmmanuel Vadot 12*c9ccf3a3SEmmanuel VadotallOf: 13*c9ccf3a3SEmmanuel Vadot - $ref: ufs-common.yaml 14*c9ccf3a3SEmmanuel Vadot 15*c9ccf3a3SEmmanuel Vadotproperties: 16*c9ccf3a3SEmmanuel Vadot compatible: 17*c9ccf3a3SEmmanuel Vadot enum: 18*c9ccf3a3SEmmanuel Vadot - mediatek,mt8183-ufshci 19*c9ccf3a3SEmmanuel Vadot - mediatek,mt8192-ufshci 20*c9ccf3a3SEmmanuel Vadot 21*c9ccf3a3SEmmanuel Vadot clocks: 22*c9ccf3a3SEmmanuel Vadot maxItems: 1 23*c9ccf3a3SEmmanuel Vadot 24*c9ccf3a3SEmmanuel Vadot clock-names: 25*c9ccf3a3SEmmanuel Vadot items: 26*c9ccf3a3SEmmanuel Vadot - const: ufs 27*c9ccf3a3SEmmanuel Vadot 28*c9ccf3a3SEmmanuel Vadot phys: 29*c9ccf3a3SEmmanuel Vadot maxItems: 1 30*c9ccf3a3SEmmanuel Vadot 31*c9ccf3a3SEmmanuel Vadot reg: 32*c9ccf3a3SEmmanuel Vadot maxItems: 1 33*c9ccf3a3SEmmanuel Vadot 34*c9ccf3a3SEmmanuel Vadot vcc-supply: true 35*c9ccf3a3SEmmanuel Vadot 36*c9ccf3a3SEmmanuel Vadotrequired: 37*c9ccf3a3SEmmanuel Vadot - compatible 38*c9ccf3a3SEmmanuel Vadot - clocks 39*c9ccf3a3SEmmanuel Vadot - clock-names 40*c9ccf3a3SEmmanuel Vadot - phys 41*c9ccf3a3SEmmanuel Vadot - reg 42*c9ccf3a3SEmmanuel Vadot - vcc-supply 43*c9ccf3a3SEmmanuel Vadot 44*c9ccf3a3SEmmanuel VadotunevaluatedProperties: false 45*c9ccf3a3SEmmanuel Vadot 46*c9ccf3a3SEmmanuel Vadotexamples: 47*c9ccf3a3SEmmanuel Vadot - | 48*c9ccf3a3SEmmanuel Vadot #include <dt-bindings/clock/mt8183-clk.h> 49*c9ccf3a3SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 50*c9ccf3a3SEmmanuel Vadot 51*c9ccf3a3SEmmanuel Vadot soc { 52*c9ccf3a3SEmmanuel Vadot #address-cells = <2>; 53*c9ccf3a3SEmmanuel Vadot #size-cells = <2>; 54*c9ccf3a3SEmmanuel Vadot 55*c9ccf3a3SEmmanuel Vadot ufs@ff3c0000 { 56*c9ccf3a3SEmmanuel Vadot compatible = "mediatek,mt8183-ufshci"; 57*c9ccf3a3SEmmanuel Vadot reg = <0 0x11270000 0 0x2300>; 58*c9ccf3a3SEmmanuel Vadot interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>; 59*c9ccf3a3SEmmanuel Vadot phys = <&ufsphy>; 60*c9ccf3a3SEmmanuel Vadot 61*c9ccf3a3SEmmanuel Vadot clocks = <&infracfg_ao CLK_INFRA_UFS>; 62*c9ccf3a3SEmmanuel Vadot clock-names = "ufs"; 63*c9ccf3a3SEmmanuel Vadot freq-table-hz = <0 0>; 64*c9ccf3a3SEmmanuel Vadot 65*c9ccf3a3SEmmanuel Vadot vcc-supply = <&mt_pmic_vemc_ldo_reg>; 66*c9ccf3a3SEmmanuel Vadot }; 67*c9ccf3a3SEmmanuel Vadot }; 68