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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dmediatek-mdp.txt6 - compatible: "mediatek,mt8173-mdp"
7 - mediatek,vpu: the node of video processor unit, see
8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details.
11 - compatible: Should be one of
12 "mediatek,mt8173-mdp-rdma" - read DMA
13 "mediatek,mt8173-mdp-rsz" - resizer
14 "mediatek,mt8173-mdp-wdma" - write DMA
15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation
16 - reg: Physical base address and length of the function block register space
17 - clocks: device clocks, see
[all …]
H A Dmediatek,vcodec-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-decode
[all...]
H A Dmediatek-vcodec.txt7 - compatible : must be one of the following string:
8 "mediatek,mt8173-vcodec-enc-vp8" for mt8173 vp8 encoder.
9 "mediatek,mt8173-vcodec-enc" for mt8173 avc encoder.
10 "mediatek,mt8183-vcodec-enc" for MT8183 encoder.
11 "mediatek,mt8173-vcodec-dec" for MT8173 decoder.
12 "mediatek,mt8192-vcodec-enc" for MT8192 encoder.
13 "mediatek,mt8183-vcodec-dec" for MT8183 decoder.
14 "mediatek,mt8195-vcodec-enc" for MT8195 encoder.
15 - reg : Physical base address of the video codec registers and length of
17 - interrupts : interrupt number to the cpu.
[all …]
H A Dmediatek-jpeg-decoder.txt6 - compatible : must be one of the following string:
7 "mediatek,mt8173-jpgdec"
8 "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
9 "mediatek,mt2701-jpgdec"
10 - reg : physical base address of the jpeg decoder registers and length of
12 - interrupts : interrupt number to the interrupt controller.
13 - clocks: device clocks, see
14 Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
15 - clock-names: must contain "jpgdec-smi" and "jpgdec".
16 - power-domains: a phandle to the power domain, see
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,disp.txt29 - compatible: "mediatek,<chip>-disp-<function>", one of
30 "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
31 "mediatek,<chip>-disp-ovl-2l" - overlay (2 layers, blending, csc)
32 "mediatek,<chip>-disp-rdma" - read DMA / line buffer
33 "mediatek,<chip>-disp-wdma" - write DMA
34 "mediatek,<chip>-disp-ccorr" - color correction
35 "mediatek,<chip>-disp-color" - color processor
36 "mediatek,<chip>-disp-dither" - dither
37 "mediatek,<chip>-disp-aal" - adaptive ambient light controller
38 "mediatek,<chip>-disp-gamma" - gamma correction
[all …]
H A Dmediatek,ufoe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
25 - enum:
26 - mediatek,mt8173-disp-ufoe
27 - items:
28 - const: mediatek,mt6795-disp-ufoe
29 - const: mediatek,mt8173-disp-ufoe
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H A Dmediatek,wdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-wdma
26 - items:
27 - const: mediatek,mt6795-disp-wdma
28 - const: mediatek,mt8173-disp-wdma
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H A Dmediatek,color.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
25 - enum:
26 - mediatek,mt2701-disp-color
27 - mediatek,mt8167-disp-color
28 - mediatek,mt8173-disp-color
29 - mediatek,mt8195-mdp3-color
[all …]
H A Dmediatek,gamma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-gamma
26 - mediatek,mt8183-disp-gamma
27 - mediatek,mt8195-disp-gamma
28 - items:
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H A Dmediatek,aal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-aal
26 - mediatek,mt8183-disp-aal
27 - mediatek,mt8195-mdp3-aal
28 - items:
[all …]
H A Dmediatek,ovl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt2701-disp-ovl
26 - mediatek,mt8173-disp-ovl
27 - mediatek,mt8183-disp-ovl
28 - mediatek,mt8192-disp-ovl
[all …]
H A Dmediatek,rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 data into DMA. It provides real time data to the back-end panel
26 - enum:
27 - mediatek,mt2701-disp-rdma
28 - mediatek,mt8173-disp-rdma
29 - mediatek,mt8183-disp-rdma
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/freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/
H A Dscpsys.txt1 MediaTek SCPSYS
4 The System Control Processor System (SCPSYS) has several power management
7 The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power
11 power/power-domain.yaml. It provides the power domains defined in
12 - include/dt-bindings/power/mt8173-power.h
13 - include/dt-bindings/power/mt6797-power.h
14 - include/dt-bindings/power/mt6765-power.h
15 - include/dt-bindings/power/mt2701-power.h
16 - include/dt-bindings/power/mt2712-power.h
17 - include/dt-bindings/power/mt7622-power.h
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/freebsd/sys/contrib/device-tree/Bindings/power/
H A Dmediatek,power-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controlle
[all...]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dmediatek,mtk-xhci.txt1 MT8173 xHCI
6 the second one supports dual-role mode, and the host is based on xHCI
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
[all …]
H A Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
[all …]
H A Dmediatek,mtu3.txt4 - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
5 soc-model is the name of SoC, such as mt8173, mt2712 etc,
8 - "mediatek,mt8173-mtu3"
9 - reg : specifies physical base address and size of the registers
10 - reg-names: should be "mac" for device IP and "ippc" for IP port control
11 - interrupts : interrupt used by the device IP
12 - power-domains : a phandle to USB power domain node to control USB's
14 - vusb33-supply : regulator of USB avdd3.3v
15 - clocks : a list of phandle + clock-specifier pairs, one for each
16 entry in clock-names
[all …]
H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dmediatek,mt8195-scpsys.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
13 MediaTek System Control Processor System (SCPSYS) has several
20 - enum:
21 - mediatek,mt8167-scpsys
22 - mediatek,mt8173-scpsys
23 - mediatek,mt8183-scpsys
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dmediatek,smi-larb.txt6 - compatible : must be one of :
7 "mediatek,mt2701-smi-larb"
8 "mediatek,mt2712-smi-larb"
9 "mediatek,mt6779-smi-larb"
10 "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"
11 "mediatek,mt8167-smi-larb"
12 "mediatek,mt8173-smi-larb"
13 "mediatek,mt8183-smi-larb"
14 - reg : the register and size of this local arbiter.
15 - mediatek,smi : a phandle to the smi_common node.
[all …]
H A Dmediatek,smi-common.txt8 generation 2: mt2712, mt6779, mt8167, mt8173 and mt8183.
18 - compatible : must be one of :
19 "mediatek,mt2701-smi-common"
20 "mediatek,mt2712-smi-common"
21 "mediatek,mt6779-smi-common"
22 "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common"
23 "mediatek,mt8167-smi-common"
24 "mediatek,mt8173-smi-common"
25 "mediatek,mt8183-smi-common"
26 - reg : the register and size of the SMI block.
[all …]
H A Dmediatek,smi-larb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controller
[all...]
H A Dmediatek,smi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.
31 - enum:
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
34 - mediatek,mt6779-smi-common
[all …]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cell
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dmtk-gce.txt9 mailbox.txt for generic information about mailbox device-tree bindings.
12 - compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce",
13 "mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or
14 "mediatek,mt6779-gce".
15 - reg: Address range of the GCE unit
16 - interrupts: The interrupt signal from the GCE block
17 - clock: Clocks according to the common clock binding
18 - clock-names: Must be "gce" to stand for GCE clock
19 - #mbox-cells: Should be 2.
26 - mboxes: Client use mailbox to communicate with GCE, it should have this
[all …]

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