Searched +full:mt8167 +full:- +full:power (Results 1 – 13 of 13) sorted by relevance
/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8167.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt8167-clk.h> 9 #include <dt-bindings/memory/mt8167-larb-port.h> 10 #include <dt-bindings/power/mt8167-power.h> 12 #include "mt8167-pinfunc.h" 17 compatible = "mediatek,mt8167"; 21 compatible = "mediatek,mt8167-topckgen", "syscon"; 23 #clock-cells = <1>; 27 compatible = "mediatek,mt8167-infracfg", "syscon"; 29 #clock-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/power/ |
H A D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek Power Domains Controller 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 11 - Matthias Brugger <mbrugger@suse.com> 14 Mediatek processors include support for multiple power domains which can be 15 powered up/down by software based on different application scenes to save power. 17 IP cores belonging to a power domain should contain a 'power-domains' [all …]
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | mediatek,smi-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195. 31 - enum: 32 - mediatek,mt2701-smi-common 33 - mediatek,mt2712-smi-common 34 - mediatek,mt6779-smi-common [all …]
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H A D | mediatek,smi-larb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 19 - enum: 20 - mediatek,mt2701-smi-larb 21 - mediatek,mt2712-smi-larb 22 - mediatek,mt6779-smi-larb 23 - mediatek,mt6795-smi-larb [all …]
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/linux/drivers/pmdomain/mediatek/ |
H A D | mt8167-pm-domains.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 6 #include "mtk-pm-domains.h" 7 #include <dt-bindings/power/mt8167-power.h> 13 * MT8167 power domain support
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H A D | mtk-pm-domains.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/clk-provider.h> 19 #include "mt6735-pm-domains.h" 20 #include "mt6795-pm-domains.h" 21 #include "mt8167-pm-domains.h" 22 #include "mt8173-pm-domains.h" 23 #include "mt8183-pm-domains.h" 24 #include "mt8186-pm-domains.h" 25 #include "mt8188-pm-domains.h" 26 #include "mt8192-pm-domains.h" [all …]
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/linux/Documentation/devicetree/bindings/iommu/ |
H A D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yong Wu <yong.wu@mediatek.com> 16 ARM Short-Descriptor translation table format for address translation. 24 +--------+ 26 gals0-rx gals1-rx (Global Async Local Sync rx) 29 gals0-tx gals1-tx (Global Async Local Sync tx) 31 +--------+ 35 +----------------+------- [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | mediatek,mt8195-scpsys.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 14 power management tasks. The tasks include MTCMOS power 20 - enum: 21 - mediatek,mt8167-scpsys 22 - mediatek,mt8173-scpsys 23 - mediatek,mt8183-scpsys [all …]
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/linux/Documentation/devicetree/bindings/soc/mediatek/ |
H A D | mediatek,mutex.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display 27 - mediatek,mt2701-disp-mutex 28 - mediatek,mt2712-disp-mutex 29 - mediatek,mt6795-disp-mutex 30 - mediatek,mt8167-disp-mutex [all …]
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/linux/Documentation/devicetree/bindings/pwm/ |
H A D | mediatek,pwm-disp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jitao Shi <jitao.shi@mediatek.com> 13 - $ref: pwm.yaml# 18 - enum: 19 - mediatek,mt2701-disp-pwm 20 - mediatek,mt6595-disp-pwm 21 - mediatek,mt8173-disp-pwm [all …]
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/linux/Documentation/devicetree/bindings/arm/mediatek/ |
H A D | mediatek,audsys.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eugen Hristev <eugen.hristev@collabora.com> 18 - items: 19 - enum: 20 - mediatek,mt2701-audsys 21 - mediatek,mt6765-audsys 22 - mediatek,mt6779-audsys 23 - mediatek,mt7622-audsys [all …]
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/linux/drivers/cpufreq/ |
H A D | mediatek-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org> 30 * on each CPU power/clock domain of Mediatek SoCs. Each CPU cluster in 33 * 100mV < Vsram - Vproc < 200mV 71 if (cpumask_test_cpu(cpu, &info->cpus)) in mtk_cpu_dvfs_info_lookup() 81 const struct mtk_cpufreq_platform_data *soc_data = info->soc_data; in mtk_cpufreq_voltage_tracking() 82 struct regulator *proc_reg = info->proc_reg; in mtk_cpufreq_voltage_tracking() 83 struct regulator *sram_reg = info->sram_reg; in mtk_cpufreq_voltage_tracking() 85 int retry = info->vtrack_max; in mtk_cpufreq_voltage_tracking() 89 dev_err(info->cpu_dev, in mtk_cpufreq_voltage_tracking() [all …]
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/linux/drivers/iommu/ |
H A D | mtk_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2015-2016 MediaTek Inc. 6 #include <linux/arm-smccc.h> 17 #include <linux/io-pgtable.h> 36 #include <dt-bindings/memory/mtk-memory-port.h> 152 ((((pdata)->flags) & (mask)) == (_x)) 208 * is in 4G-8G and cam is in 8G-12G. Meanwhile, some masters may have the 210 * 0x40000000-0x44000000. 272 * In the sharing pgtable case, list data->list to the global list like m4ulist. 273 * In the non-sharing pgtable case, list data->list to the itself hw_list_head. [all …]
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