1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
4 *
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2013 John Crispin <john@phrozen.org>
7 *
8 * This driver was based on: drivers/watchdog/softdog.c
9 */
10
11 #include <linux/clk.h>
12 #include <linux/reset.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/watchdog.h>
16 #include <linux/moduleparam.h>
17 #include <linux/platform_device.h>
18
19 #include <asm/mach-ralink/ralink_regs.h>
20
21 #define SYSC_RSTSTAT 0x38
22 #define WDT_RST_CAUSE BIT(1)
23
24 #define RALINK_WDT_TIMEOUT 30
25 #define RALINK_WDT_PRESCALE 65536
26
27 #define TIMER_REG_TMR1LOAD 0x00
28 #define TIMER_REG_TMR1CTL 0x08
29
30 #define TMRSTAT_TMR1RST BIT(5)
31
32 #define TMR1CTL_ENABLE BIT(7)
33 #define TMR1CTL_MODE_SHIFT 4
34 #define TMR1CTL_MODE_MASK 0x3
35 #define TMR1CTL_MODE_FREE_RUNNING 0x0
36 #define TMR1CTL_MODE_PERIODIC 0x1
37 #define TMR1CTL_MODE_TIMEOUT 0x2
38 #define TMR1CTL_MODE_WDT 0x3
39 #define TMR1CTL_PRESCALE_MASK 0xf
40 #define TMR1CTL_PRESCALE_65536 0xf
41
42 struct rt2880_wdt_data {
43 void __iomem *base;
44 unsigned long freq;
45 struct clk *clk;
46 struct reset_control *rst;
47 struct watchdog_device wdt;
48 };
49
50 static bool nowayout = WATCHDOG_NOWAYOUT;
51 module_param(nowayout, bool, 0);
52 MODULE_PARM_DESC(nowayout,
53 "Watchdog cannot be stopped once started (default="
54 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
55
rt_wdt_w32(void __iomem * base,unsigned int reg,u32 val)56 static inline void rt_wdt_w32(void __iomem *base, unsigned int reg, u32 val)
57 {
58 iowrite32(val, base + reg);
59 }
60
rt_wdt_r32(void __iomem * base,unsigned int reg)61 static inline u32 rt_wdt_r32(void __iomem *base, unsigned int reg)
62 {
63 return ioread32(base + reg);
64 }
65
rt288x_wdt_ping(struct watchdog_device * w)66 static int rt288x_wdt_ping(struct watchdog_device *w)
67 {
68 struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w);
69
70 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1LOAD, w->timeout * drvdata->freq);
71
72 return 0;
73 }
74
rt288x_wdt_start(struct watchdog_device * w)75 static int rt288x_wdt_start(struct watchdog_device *w)
76 {
77 struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w);
78 u32 t;
79
80 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
81 t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT |
82 TMR1CTL_PRESCALE_MASK);
83 t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT |
84 TMR1CTL_PRESCALE_65536);
85 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
86
87 rt288x_wdt_ping(w);
88
89 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
90 t |= TMR1CTL_ENABLE;
91 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
92
93 return 0;
94 }
95
rt288x_wdt_stop(struct watchdog_device * w)96 static int rt288x_wdt_stop(struct watchdog_device *w)
97 {
98 struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w);
99 u32 t;
100
101 rt288x_wdt_ping(w);
102
103 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
104 t &= ~TMR1CTL_ENABLE;
105 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
106
107 return 0;
108 }
109
rt288x_wdt_set_timeout(struct watchdog_device * w,unsigned int t)110 static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
111 {
112 w->timeout = t;
113 rt288x_wdt_ping(w);
114
115 return 0;
116 }
117
rt288x_wdt_bootcause(void)118 static int rt288x_wdt_bootcause(void)
119 {
120 if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
121 return WDIOF_CARDRESET;
122
123 return 0;
124 }
125
126 static const struct watchdog_info rt288x_wdt_info = {
127 .identity = "Ralink Watchdog",
128 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
129 };
130
131 static const struct watchdog_ops rt288x_wdt_ops = {
132 .owner = THIS_MODULE,
133 .start = rt288x_wdt_start,
134 .stop = rt288x_wdt_stop,
135 .ping = rt288x_wdt_ping,
136 .set_timeout = rt288x_wdt_set_timeout,
137 };
138
rt288x_wdt_probe(struct platform_device * pdev)139 static int rt288x_wdt_probe(struct platform_device *pdev)
140 {
141 struct device *dev = &pdev->dev;
142 struct watchdog_device *wdt;
143 struct rt2880_wdt_data *drvdata;
144 int ret;
145
146 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
147 if (!drvdata)
148 return -ENOMEM;
149
150 drvdata->base = devm_platform_ioremap_resource(pdev, 0);
151 if (IS_ERR(drvdata->base))
152 return PTR_ERR(drvdata->base);
153
154 drvdata->clk = devm_clk_get(dev, NULL);
155 if (IS_ERR(drvdata->clk))
156 return PTR_ERR(drvdata->clk);
157
158 drvdata->rst = devm_reset_control_get_exclusive(dev, NULL);
159 if (!IS_ERR(drvdata->rst))
160 reset_control_deassert(drvdata->rst);
161
162 drvdata->freq = clk_get_rate(drvdata->clk) / RALINK_WDT_PRESCALE;
163
164 wdt = &drvdata->wdt;
165 wdt->info = &rt288x_wdt_info;
166 wdt->ops = &rt288x_wdt_ops;
167 wdt->min_timeout = 1;
168 wdt->max_timeout = (0xfffful / drvdata->freq);
169 wdt->parent = dev;
170 wdt->bootstatus = rt288x_wdt_bootcause();
171
172 watchdog_init_timeout(wdt, wdt->max_timeout, dev);
173 watchdog_set_nowayout(wdt, nowayout);
174 watchdog_set_drvdata(wdt, drvdata);
175
176 watchdog_stop_on_reboot(wdt);
177 ret = devm_watchdog_register_device(dev, &drvdata->wdt);
178 if (!ret)
179 dev_info(dev, "Initialized\n");
180
181 return 0;
182 }
183
184 static const struct of_device_id rt288x_wdt_match[] = {
185 { .compatible = "ralink,rt2880-wdt" },
186 {},
187 };
188 MODULE_DEVICE_TABLE(of, rt288x_wdt_match);
189
190 static struct platform_driver rt288x_wdt_driver = {
191 .probe = rt288x_wdt_probe,
192 .driver = {
193 .name = KBUILD_MODNAME,
194 .of_match_table = rt288x_wdt_match,
195 },
196 };
197
198 module_platform_driver(rt288x_wdt_driver);
199
200 MODULE_DESCRIPTION("MediaTek/Ralink RT288x/RT3xxx hardware watchdog driver");
201 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
202 MODULE_LICENSE("GPL v2");
203