Searched +full:mt7622 +full:- +full:pinctrl (Results 1 – 10 of 10) sorted by relevance
/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt7622-rfb1.dts | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 13 #include "mt7622.dtsi" 17 model = "MediaTek MT7622 RFB1 board"; 18 chassis-type = "embedded"; 19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; [all …]
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H A D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> 15 #include <dt-bindings/thermal/thermal.h> 18 compatible = "mediatek,mt7622"; 19 interrupt-parent = <&sysirq>; [all …]
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H A D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 13 #include "mt7622.dtsi" 17 model = "Bananapi BPI-R64"; 18 chassis-type = "embedded"; 19 compatible = "bananapi,bpi-r64", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; [all …]
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/linux/Documentation/devicetree/bindings/serial/ |
H A D | mediatek,uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 13 - $ref: serial.yaml# 23 - const: mediatek,mt6577-uart 24 - items: 25 - enum: 26 - mediatek,mt2701-uart 27 - mediatek,mt2712-uart [all …]
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/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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/linux/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mt7622.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2017-2018 MediaTek Inc. 9 #include "pinctrl-moore.h" 874 { .compatible = "mediatek,mt7622-pinctrl", }, 885 .name = "mt7622-pinctrl",
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/linux/drivers/mmc/host/ |
H A D | mtk-sd.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015, 2022 MediaTek Inc. 11 #include <linux/dma-mapping.h> 16 #include <linux/pinctrl/consumer.h> 33 #include <linux/mmc/slot-gpio.h> 41 /*--------------------------------------------------------------------------*/ 43 /*--------------------------------------------------------------------------*/ 50 /*--------------------------------------------------------------------------*/ 52 /*--------------------------------------------------------------------------*/ 90 /*--------------------------------------------------------------------------*/ [all …]
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/linux/drivers/rtc/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 44 This clock should be battery-backed, so that it reads the correct 45 time when the system boots from a power-off state. Otherwise, your 141 once-per-second update interrupts, used for synchronization. 159 will be called rtc-test. 173 will be called rtc-88pm860x. 183 will be called rtc-88pm80x. 193 will be called rtc-88pm886. 197 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3" 200 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip. [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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/linux/drivers/net/ethernet/mediatek/ |
H A D | mtk_eth_soc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> 5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> 6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> 22 #include <linux/pinctrl/devinfo.h> 24 #include <linux/pcs/pcs-mtk-lynxi.h> 34 static int mtk_msg_level = -1; 36 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); 294 __raw_writel(val, eth->base + reg); in mtk_w32() 299 return __raw_readl(eth->base + reg); in mtk_r32() [all …]
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