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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi11 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
12 #include <dt-bindings/gce/mediatek,mt6795-gce.h>
13 #include <dt-bindings/memory/mt6795-larb-port.h>
14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
15 #include <dt-bindings/power/mt6795-power.h>
16 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
19 compatible = "mediatek,mt6795";
270 compatible = "mediatek,mt6795-topckgen", "syscon";
276 compatible = "mediatek,mt6795-infracfg", "syscon";
283 compatible = "mediatek,mt6795-pericfg", "syscon";
[all …]
H A Dmt6795-evb.dts8 #include "mt6795.dtsi"
11 model = "MediaTek MT6795 Evaluation Board";
13 compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt6795-clock.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt6795-clock.yaml#
7 title: MediaTek Functional Clock Controller for MT6795
26 - mediatek,mt6795-mfgcfg
27 - mediatek,mt6795-vdecsys
28 - mediatek,mt6795-vencsys
50 compatible = "mediatek,mt6795-mfgcfg";
56 compatible = "mediatek,mt6795-vdecsys";
62 compatible = "mediatek,mt6795-vencsys";
H A Dmediatek,infracfg.yaml28 - mediatek,mt6795-infracfg
68 - mediatek,mt6795-infracfg
H A Dmediatek,mt8186-fhctl.yaml20 - mediatek,mt6795-fhctl
H A Dmediatek,apmixedsys.yaml41 - mediatek,mt6795-apmixedsys
H A Dmediatek,pericfg.yaml25 - mediatek,mt6795-pericfg
H A Dmediatek,topckgen.yaml38 - mediatek,mt6795-topckgen
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt6795-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
7 title: MediaTek MT6795 Pin Controller
14 The MediaTek's MT6795 Pin controller is used to control SoC pins.
18 const: mediatek,mt6795-pinctrl
101 description: mt6795 pull down PUPD/R0/R1 type define value.
111 description: mt6795 pull up PUPD/R0/R1 type define value.
178 #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
185 compatible = "mediatek,mt6795-pinctrl";
/linux/drivers/clk/mediatek/
H A Dclk-mt6795-mfg.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
35 { .compatible = "mediatek,mt6795-mfgcfg", .data = &mfg_desc },
42 .name = "clk-mt6795-mfg",
50 MODULE_DESCRIPTION("MediaTek MT6795 mfg clocks driver");
H A Dclk-mt6795-vdecsys.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
40 { .compatible = "mediatek,mt6795-vdecsys", .data = &vdec_desc },
49 .name = "clk-mt6795-vdecsys",
55 MODULE_DESCRIPTION("MediaTek MT6795 vdecsys clocks driver");
H A Dclk-mt6795-vencsys.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
35 { .compatible = "mediatek,mt6795-vencsys", .data = &venc_desc },
42 .name = "clk-mt6795-vencsys",
50 MODULE_DESCRIPTION("MediaTek MT6795 vdecsys clocks driver");
H A Dclk-mt6795-infracfg.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
8 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
81 { .compatible = "mediatek,mt6795-infracfg" },
143 .name = "clk-mt6795-infracfg",
151 MODULE_DESCRIPTION("MediaTek MT6795 infracfg clocks driver");
H A Dclk-mt6795-pericfg.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
8 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
89 { .compatible = "mediatek,mt6795-pericfg" },
152 .name = "clk-mt6795-pericfg",
160 MODULE_DESCRIPTION("MediaTek MT6795 pericfg clocks driver");
H A DMakefile26 obj-$(CONFIG_COMMON_CLK_MT6795) += clk-mt6795-apmixedsys.o clk-mt6795-infracfg.o \
27 clk-mt6795-pericfg.o clk-mt6795-topckgen.o
28 obj-$(CONFIG_COMMON_CLK_MT6795_MFGCFG) += clk-mt6795-mfg.o
29 obj-$(CONFIG_COMMON_CLK_MT6795_MMSYS) += clk-mt6795-mm.o
30 obj-$(CONFIG_COMMON_CLK_MT6795_VDECSYS) += clk-mt6795-vdecsys.o
31 obj-$(CONFIG_COMMON_CLK_MT6795_VENCSYS) += clk-mt6795-vencsys.o
H A Dclk-mt6795-mm.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
85 { .name = "clk-mt6795-mm", .driver_data = (kernel_ulong_t)&mm_desc },
92 .name = "clk-mt6795-mm",
100 MODULE_DESCRIPTION("MediaTek MT6795 MMSYS clocks driver");
H A DKconfig307 tristate "Clock driver for MediaTek MT6795"
313 This driver supports MediaTek MT6795 basic clocks and clocks
317 tristate "Clock driver for MediaTek MT6795 mfgcfg"
321 This driver supports MediaTek MT6795 mfgcfg clocks.
324 tristate "Clock driver for MediaTek MT6795 mmsys"
328 This driver supports MediaTek MT6795 mmsys clocks.
331 tristate "Clock driver for MediaTek MT6795 VDECSYS"
335 This driver supports MediaTek MT6795 vdecsys clocks.
338 tristate "Clock driver for MediaTek MT6795 VENCSYS"
342 This driver supports MediaTek MT6795 vencsys clocks.
H A Dclk-mt6795-apmixedsys.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
131 { .compatible = "mediatek,mt6795-apmixedsys" },
141 const u8 *fhctl_node = "mediatek,mt6795-fhctl"; in clk_mt6795_apmixed_probe()
206 .name = "clk-mt6795-apmixed",
212 MODULE_DESCRIPTION("MediaTek MT6795 apmixed clocks driver");
H A Dclk-mt6795-topckgen.c7 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
539 { .compatible = "mediatek,mt6795-topckgen", .data = &topck_desc },
546 .name = "clk-mt6795-topckgen",
554 MODULE_DESCRIPTION("MediaTek MT6795 topckgen clocks driver");
/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml76 - mediatek,mt6795-m4u # generation two
133 dt-binding/memory/mt6795-larb-port.h for mt6795,
159 - mediatek,mt6795-m4u
193 - mediatek,mt6795-m4u
/linux/drivers/pmdomain/mediatek/
H A Dmt6795-pm-domains.h7 #include <dt-bindings/power/mt6795-power.h>
10 * MT6795 power domain support
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,mutex.yaml29 - mediatek,mt6795-disp-mutex
84 - mediatek,mt6795-disp-mutex
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-common.yaml35 - mediatek,mt6795-smi-common
156 - mediatek,mt6795-smi-common
/linux/Documentation/devicetree/bindings/power/
H A Dmediatek,power-controller.yaml27 - mediatek,mt6795-power-controller
90 "include/dt-bindings/power/mt6795-power.h" - for MT8167 type power domain.
/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,pwm-disp.yaml25 - mediatek,mt6795-disp-pwm

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