Searched +full:msm8960 +full:- +full:pinctrl (Results 1 – 9 of 9) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | qcom,msm8960-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qco [all...] |
H A D | qcom,msm8960-pinctrl.txt | 1 Qualcomm MSM8960 TLMM block 4 MSM8960 platform. 6 - compatible: 9 Definition: must be "qcom,msm8960-pinctrl" 11 - reg: 13 Value type: <prop-encoded-array> 16 - interrupts: 18 Value type: <prop-encoded-array> 21 - interrupt-controller: 26 - #interrupt-cells: [all …]
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H A D | qcom,apq8084-pinctrl.txt | 4 MSM8960 platform. 6 - compatible: 9 Definition: must be "qcom,apq8084-pinctrl" 11 - reg: 13 Value type: <prop-encoded-array> 16 - interrupts: 18 Value type: <prop-encoded-array> 21 - interrupt-controller: 26 - #interrupt-cells: 30 in <dt-bindings/interrupt-controller/irq.h> [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-msm8960.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8960 [all...] |
H A D | qcom-msm8960-cdp.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 4 #include "qcom-msm8960.dtsi" 8 model = "Qualcomm MSM8960 CDP"; 9 compatible = "qcom,msm8960-cdp", "qcom,msm8960"; [all...] |
H A D | qcom-msm8960-samsung-expressatt.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 5 #include "qcom-msm8960.dtsi" 9 model = "Samsung Galaxy Express SGH-I43 [all...] |
H A D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/clock/qcom,lcc-msm8960 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | qcom_adm.txt | 4 - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 5 - reg: Address range for DMA registers 6 - interrupts: Should contain one interrupt shared by all channels 7 - #dma-cells: must be <2>. First cell denotes the channel number. Second cell 9 - clocks: Should contain the core clock and interface clock. 10 - clock-names: Must contain "core" for the core clock and "iface" for the 12 - resets: Must contain an entry for each entry in reset names. 13 - reset-names: Must include the following entries: 14 - clk 15 - c0 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/ |
H A D | qcom,gsbi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 16 representing a serial sub-node device that is mux'd as part of the GSBI 26 const: qcom,gsbi-v1.0.0 28 '#address-cells': 31 cell-index: [all …]
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