1*c66ec88fSEmmanuel VadotQCOM ADM DMA Controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 5*c66ec88fSEmmanuel Vadot- reg: Address range for DMA registers 6*c66ec88fSEmmanuel Vadot- interrupts: Should contain one interrupt shared by all channels 7*c66ec88fSEmmanuel Vadot- #dma-cells: must be <2>. First cell denotes the channel number. Second cell 8*c66ec88fSEmmanuel Vadot denotes CRCI (client rate control interface) flow control assignment. 9*c66ec88fSEmmanuel Vadot- clocks: Should contain the core clock and interface clock. 10*c66ec88fSEmmanuel Vadot- clock-names: Must contain "core" for the core clock and "iface" for the 11*c66ec88fSEmmanuel Vadot interface clock. 12*c66ec88fSEmmanuel Vadot- resets: Must contain an entry for each entry in reset names. 13*c66ec88fSEmmanuel Vadot- reset-names: Must include the following entries: 14*c66ec88fSEmmanuel Vadot - clk 15*c66ec88fSEmmanuel Vadot - c0 16*c66ec88fSEmmanuel Vadot - c1 17*c66ec88fSEmmanuel Vadot - c2 18*c66ec88fSEmmanuel Vadot- qcom,ee: indicates the security domain identifier used in the secure world. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotExample: 21*c66ec88fSEmmanuel Vadot adm_dma: dma@18300000 { 22*c66ec88fSEmmanuel Vadot compatible = "qcom,adm"; 23*c66ec88fSEmmanuel Vadot reg = <0x18300000 0x100000>; 24*c66ec88fSEmmanuel Vadot interrupts = <0 170 0>; 25*c66ec88fSEmmanuel Vadot #dma-cells = <2>; 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; 28*c66ec88fSEmmanuel Vadot clock-names = "core", "iface"; 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel Vadot resets = <&gcc ADM0_RESET>, 31*c66ec88fSEmmanuel Vadot <&gcc ADM0_C0_RESET>, 32*c66ec88fSEmmanuel Vadot <&gcc ADM0_C1_RESET>, 33*c66ec88fSEmmanuel Vadot <&gcc ADM0_C2_RESET>; 34*c66ec88fSEmmanuel Vadot reset-names = "clk", "c0", "c1", "c2"; 35*c66ec88fSEmmanuel Vadot qcom,ee = <0>; 36*c66ec88fSEmmanuel Vadot }; 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel VadotDMA clients must use the format descripted in the dma.txt file, using a three 39*c66ec88fSEmmanuel Vadotcell specifier for each channel. 40*c66ec88fSEmmanuel Vadot 41*c66ec88fSEmmanuel VadotEach dmas request consists of 3 cells: 42*c66ec88fSEmmanuel Vadot 1. phandle pointing to the DMA controller 43*c66ec88fSEmmanuel Vadot 2. channel number 44*c66ec88fSEmmanuel Vadot 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0. 45*c66ec88fSEmmanuel Vadot The CRCI is used for flow control. It identifies the peripheral device that 46*c66ec88fSEmmanuel Vadot is the source/destination for the transferred data. 47*c66ec88fSEmmanuel Vadot 48*c66ec88fSEmmanuel VadotExample: 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadot spi4: spi@1a280000 { 51*c66ec88fSEmmanuel Vadot spi-max-frequency = <50000000>; 52*c66ec88fSEmmanuel Vadot 53*c66ec88fSEmmanuel Vadot pinctrl-0 = <&spi_pins>; 54*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 55*c66ec88fSEmmanuel Vadot 56*c66ec88fSEmmanuel Vadot cs-gpios = <&qcom_pinmux 20 0>; 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadot dmas = <&adm_dma 6 9>, 59*c66ec88fSEmmanuel Vadot <&adm_dma 5 10>; 60*c66ec88fSEmmanuel Vadot dma-names = "rx", "tx"; 61*c66ec88fSEmmanuel Vadot }; 62