Searched +full:msm8916 +full:- +full:smp (Results 1 – 10 of 10) sorted by relevance
/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-msm8916-smp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 enable-method = "qcom,msm8916-smp"; 9 enable-method = "qcom,msm8916-smp"; 12 enable-method = "qcom,msm8916-smp"; 15 enable-method = "qcom,msm8916-smp"; 18 idle-states { 19 /delete-property/ entry-method; 29 compatible = "qcom,idle-state-spc", "arm,idle-state";
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H A D | qcom-msm8916-samsung-e7.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 #include "arm64/qcom/msm8916-samsung-e7.dts" 3 #include "qcom-msm8916-smp.dtsi"
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H A D | qcom-msm8916-samsung-serranove.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 #include "arm64/qcom/msm8916-samsung-serranove.dts" 3 #include "qcom-msm8916-smp.dtsi"
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H A D | qcom-msm8916-samsung-grandmax.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 #include "arm64/qcom/msm8916-samsung-grandmax.dts" 3 #include "qcom-msm8916-smp.dtsi"
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H A D | qcom-msm8916-samsung-e5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 #include "arm64/qcom/msm8916-samsung-e5.dts" 3 #include "qcom-msm8916-smp.dtsi"
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H A D | qcom-msm8226.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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/linux/Documentation/devicetree/bindings/arm/ |
H A D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 21 with updates for 32-bit and 64-bit ARM systems provided in this document. 30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in 59 On 32-bit ARM v7 or later systems this property is 68 On ARM v8 64-bit systems this property is required 71 * If cpus node's #address-cells property is set to 2 79 * If cpus node's #address-cells property is set to 1 [all …]
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/linux/arch/arm/mach-qcom/ |
H A D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 #include <linux/smp.h> 59 node = of_find_compatible_node(NULL, NULL, "qcom,gcc-msm8660"); in scss_release_secondary() 62 return -ENXIO; in scss_release_secondary() 68 return -ENOMEM; in scss_release_secondary() 88 return -ENODEV; in cortex_a7_release_secondary() 92 ret = -ENODEV; in cortex_a7_release_secondary() 98 ret = -ENOMEM; in cortex_a7_release_secondary() 144 return -ENODEV; in kpssv1_release_secondary() 148 ret = -ENODEV; in kpssv1_release_secondary() [all …]
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/linux/drivers/soc/qcom/ |
H A D | spm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved. 20 #include <linux/smp.h> 259 if (drv->reg_data->reg_offset[reg]) in spm_register_write() 260 writel_relaxed(val, drv->reg_base + in spm_register_write() 261 drv->reg_data->reg_offset[reg]); in spm_register_write() 270 if (!drv->reg_data->reg_offset[reg]) in spm_register_write_sync() 274 writel_relaxed(val, drv->reg_base + in spm_register_write_sync() 275 drv->reg_data->reg_offset[reg]); in spm_register_write_sync() 276 ret = readl_relaxed(drv->reg_base + in spm_register_write_sync() [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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