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Searched +full:mpc8313 +full:- +full:pmc (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dpmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J. Neuschäfer <j.ne@posteo.net>
14 controlling chip-wide low-power states as well as peripheral clock gating.
17 example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are
20 For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that
25 For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
27 resume. The first two cells are as described for fsl,mpc8548-pmc. This
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/linux/arch/powerpc/boot/dts/
H A Dmpc8313erdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <16384>;
34 i-cache-size = <16384>;
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H A Dmpc8315erdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <16384>;
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H A Dkmeter1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * 2008-2011 DENX Software Engineering GmbH
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>; // 32 bytes
35 i-cache-line-size = <32>; // 32 bytes
36 d-cache-size = <32768>; // L1, 32K
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/linux/arch/powerpc/platforms/83xx/
H A Dsuspend.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
49 /* All but PMCI are deep-sleep only */
61 /* deep-sleep only */
68 /* deep-sleep only */
123 u32 reg_cfg1 = in_be32(&pmc_regs->config1); in mpc83xx_change_state()
133 out_be32(&pmc_regs->config1, reg_cfg1); in mpc83xx_change_state()
145 u32 event = in_be32(&pmc_regs->event); in pmc_irq_handler()
152 out_be32(&pmc_regs->event, event); in pmc_irq_handler()
161 out_be32(&syscr_regs->sicrl, saved_regs.sicrl); in mpc83xx_suspend_restore_regs()
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