Searched +full:mpc5125 +full:- +full:gpio (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/powerpc/boot/dts/ |
| H A D | mpc5125twr.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * STx/Freescale ADS5125 MPC5125 silicon
7 * Reworked by Matteo Facchinetti (engineering@sirius-es.it)
11 #include <dt-bindings/clock/mpc512x-clock.h>
13 /dts-v1/;
17 compatible = "fsl,mpc5125ads", "fsl,mpc5125";
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&ipic>;
29 #address-cells = <1>;
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | fsl,qoriq-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,mpc5121-gpio
17 - fsl,mpc5125-gpio
18 - fsl,mpc8314-gpio
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| /linux/arch/powerpc/platforms/512x/ |
| H A D | mpc512x_shared.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/fsl-diu-fb.h>
36 out_be32(&reset_module_base->rpr, 0x52535445); in mpc512x_restart()
38 out_be32(&reset_module_base->rcr, 0x2); in mpc512x_restart()
47 u8 gamma[0x300]; /* 32-bit aligned! */
48 struct diu_ad ad0; /* 32-bit aligned! */
63 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu"); in mpc512x_set_pixel_clock()
71 clk_diu = clk_get_sys(np->name, "ipg"); in mpc512x_set_pixel_clock()
85 * determine the acceptable clock range for the monitor (+/- 5%), in mpc512x_set_pixel_clock()
88 pr_debug("DIU pixclock in ps - %u\n", pixclock); in mpc512x_set_pixel_clock()
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