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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc5125twr.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * STx/Freescale ADS5125 MPC5125 silicon
7 * Reworked by Matteo Facchinetti (engineering@sirius-es.it)
11 #include <dt-bindings/clock/mpc512x-clock.h>
13 /dts-v
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/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-mpc8xxx.txt1 * Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
4 - compatible : Should be "fsl,<soc>-gpio"
6 mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
8 - reg : Address and length of the register set for the device
9 - interrupts : Should be the port interrupt shared by all 32 pins.
10 - #gpio-cells : Should be two. The first cell is the pin number and
11 the second cell is used to specify the gpio polarity:
16 - little-endian : GPIO registers are used as little endian. If not
19 Example of gpio-controller node for a mpc5125 SoC:
21 gpio0: gpio@1100 {
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H A Dfsl,qoriq-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,mpc5121-gpio
17 - fsl,mpc5125-gpio
18 - fsl,mpc8349-gpio
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