Home
last modified time | relevance | path

Searched +full:mode +full:- +full:based (Results 1 – 25 of 1061) sorted by relevance

12345678910>>...43

/linux/drivers/firmware/arm_scmi/transports/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 This declares whether a shared memory based transport for SCMI is
20 This declares whether a message passing based transport for SCMI is
24 tristate "SCMI transport based on Mailbox"
30 Enable mailbox based transport for SCMI.
33 transport based on mailboxes, answer Y.
38 tristate "SCMI transport based o
[all...]
/linux/Documentation/ABI/testing/
H A Dsysfs-class-net-qmi9 framing from '802.3' to 'raw-ip'.
12 mode. The netdev is an ordinary ethernet device in
13 '802.3' mode, and the driver expects to exchange
15 netdev is a headerless p-t-p device in 'raw-ip' mode,
22 link framing mode, changing this setting to 'Y' if the
23 firmware is configured for 'raw-ip' mode.
33 based network device, supported by recent Qualcomm based
50 created qmap mux based network device.
69 Set this to 'Y' to enable 'pass-through' mode, allowing packets
75 'Pass-through' mode can be enabled when the device is in
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_vlan_mode.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2019-2021, Intel Corporation. */
7 * ice_pkg_get_supported_vlan_mode - determine if DDP supports Double VLAN mode
26 return -ENOMEM; in ice_pkg_get_supported_vlan_mode()
29 sect->count = cpu_to_le16(1); in ice_pkg_get_supported_vlan_mode()
30 sect->offset = cpu_to_le16(ICE_META_VLAN_MODE_ENTRY); in ice_pkg_get_supported_vlan_mode()
42 arr[i] = le32_to_cpu(sect->entry.bm[i]); in ice_pkg_get_supported_vlan_mode()
56 * ice_aq_get_vlan_mode - get the VLAN mode of the device
58 * @get_params: structure FW fills in based on the current VLAN mode config
60 * Get VLAN Mode Parameters (0x020D)
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Dqcom,spmi-haptics.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/input/qcom,spmi-haptics.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fenglin Wu <fenglin.wu@oss.qualcomm.com>
18 defined by qcom,lra-period-us and whose peak voltage is defined by
19 qcom,vmax-microvolt. The driving amplitude can be scaled in the range
20 [0, 255] via a single register byte. Hardware-based LRA auto-resonance
21 tracking is enabled by default in this mode, allowing the haptics engine
26 of 8-bit samples at a configurable play rate. Samples are pre-filled
[all …]
/linux/lib/
H A DKconfig.kasan1 # SPDX-License-Identifier: GPL-2.0-only
3 # This config refers to the generic KASAN mode.
32 compile-time constants for better performance.
35 def_bool $(cc-option, -fsanitize=kernel-address)
38 def_bool $(cc-option, -fsanitize=kernel-hwaddress)
55 Enables KASAN (Kernel Address Sanitizer) - a dynamic memory safety
56 error detector designed to find out-of-bounds and use-after-free bugs.
58 See Documentation/dev-tools/kasan.rst for details.
65 …def_bool (CC_IS_CLANG && $(cc-option,-fsanitize=kernel-address -mllvm -asan-kernel-mem-intrinsic-p…
66 (CC_IS_GCC && $(cc-option,-fsanitize=kernel-address --param asan-kernel-mem-intrinsic-prefix=1))
[all …]
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-memory.json12 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)",
30 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)",
57 …ption": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read Major Mode",
66 …tion": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Write Major Mode",
79 "PublicDescription": "Uncore Fixed Counter - uclks",
117 …iMC can correct up to 4 bit errors in independent channel mode and 8 bit errors in lockstep mode.",
121 "BriefDescription": "Cycles in a Major Mode; Isoch Major Mode",
126 …ent in a major mode (selected by a filter) on the given channel. Major modea are channel-wide, a…
131 "BriefDescription": "Cycles in a Major Mode; Partial Major Mode",
136 …ent in a major mode (selected by a filter) on the given channel. Major modea are channel-wide, a…
[all …]
/linux/drivers/gpu/drm/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 This driver provides kernel mode setting and buffer
55 on RK3288 or RK3399 based SoC, you should select this option.
66 RK3399 based SoC, you should select this
74 to enable Synopsys DesignWare Cores based DisplayPort transmit
76 rk3588 based SoC, you should select this option.
83 enable HDMI on RK3288 or RK3399 based SoC, you should select
92 enable HDMI on RK3588 based SoC, you should select this option.
100 enable MIPI DSI on RK3288 or RK3399 based SoC, you should
109 enable MIPI DSI on RK3576 or RK3588 based SoC, you should
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
12 - Daniel Machon <daniel.machon@microchip.com>
15 The SparX-5 Enterprise Ethernet switch family provides a rich set of
16 Enterprise switching features such as advanced TCAM-based VLAN and
18 security through TCAM-based frame processing using versatile content
[all …]
H A Dqcom,qca807x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Robert Marko <robert.marko@sartura.hr>
15 IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and
16 1000BASE-T PHY-s.
21 Both models have a combo port that supports 1000BASE-X and
22 100BASE-FX fiber.
25 output only pins that natively drive LED-s for up to 2 attached
[all …]
/linux/Documentation/devicetree/bindings/
H A Dcommon-properties.txt5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
23 register endianness based on the CPU's configured endianness.
[all …]
/linux/Documentation/input/devices/
H A Dedt-ft5x06.rst1 EDT ft5x06 based Polytouch devices
2 ----------------------------------
4 The edt-ft5x06 driver is useful for the EDT "Polytouch" family of capacitive
5 touch screens. Note that it is *not* suitable for other devices based on the
6 focaltec ft5x06 devices, since they contain vendor-specific firmware. In
18 allows setting the "click"-threshold in the range from 0 to 80.
34 /sys/kernel/debug/i2c/<i2c-bus>/<i2c-device>/
39 $ ls -l /sys/bus/i2c/drivers/edt_ft5x06
44 0-0038 -> ../../../../devices/platform/soc/fcfee800.i2c/i2c-0/0-0038
48 /sys/kernel/debug/i2c/i2c-0/0-0038/
[all …]
/linux/drivers/ata/
H A Dpata_cs5535.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata-cs5535.c - CS5535 PATA for new ATA layer
4 * (C) 2005-2006 Red Hat Inc
7 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
9 * and Alexander Kiausch <alex.kiausch@t-online.de>
11 * Loosely based on the piix & svwks drivers.
32 * The Geode (Aka Athlon GX now) uses an internal MSR based
58 * cs5535_cable_detect - detect cable type
68 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in cs5535_cable_detect()
78 * cs5535_set_piomode - PIO setup
[all …]
/linux/drivers/gpu/drm/bridge/
H A Dtc358762.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on tc358764.c by
9 * Based on rpi_touchscreen.c by
39 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
43 /* LCDC/DPI Host Registers, based on guesswork that this matches TC358764 */
48 #define LCDCTRL_EVTMODE BIT(5) /* Event mode */
49 #define LCDCTRL_RGB888 BIT(8) /* RGB888 mode */
76 struct drm_display_mode mode; member
83 int ret = ctx->error; in tc358762_clear_error()
85 ctx->error = 0; in tc358762_clear_error()
[all …]
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dice.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2018-2021 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Important Notes
16 - Additional Features & Configurations
17 - Performance Optimization
28 This driver supports XDP (Express Data Path) and AF_XDP zero-copy. Note that
43 -------------------------------------------
44 Devices based on the Intel(R) Ethernet Controller 800 Series are designed to
[all …]
H A De1000e.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2008-2018 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Additional Configurations
16 - Support
48 ---------------------
49 :Valid Range: 0,1,3,4,100-100000
69 it dynamically adjusts the InterruptThrottleRate value based on the traffic
82 - 0: Off
[all …]
H A De1000.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999 - 2013 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Speed and Duplex Configuration
16 - Additional Configurations
17 - Support
50 -------
54 :Valid Range: 0x01-0x0F, 0x20-0x2F
57 This parameter is a bit-mask that specifies the speed and duplex settings
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dcix,sky1-mbox.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/cix,sky1-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guomin Chen <Guomin.Chen@cixtech.com>
19 typically used in pairs-one for receiving and one for transmitting.
22 channel 0-7 - Fast channel with 32bit transmit register and IRQ support
23 channel 8 - Doorbell mode,using the mailbox as an interrupt-generating
25 channel 9 - Fifo based channel with 32*32bit depth fifo and IRQ support
26 channel 10 - Reg based channel with 32*32bit transmit register and
[all …]
/linux/drivers/hid/intel-thc-hid/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
14 is comprised of 3 key functional blocks: A natively half-duplex
22 tristate "Intel QuickSPI driver based on Intel Touch Host Controller"
25 Intel QuickSPI, based on Touch Host Controller (THC), implements
27 mode, and controls THC hardware sequencer to accelerate HIDSPI
33 tristate "Intel QuickI2C driver based on Intel Touch Host Controller"
38 mode, and controls THC hardware sequencer to accelerate HIDI2C
/linux/security/integrity/ima/
H A Dima_main.c1 // SPDX-License-Identifier: GPL-2.0-only
74 if (strcmp(template_desc->name, IMA_TEMPLATE_IMA_NAME) == 0) { in hash_setup()
114 mapping_writably_mapped(file->f_mapping)) { in mmap_violation_check()
115 rc = -ETXTBSY; in mmap_violation_check()
118 if (!*pathbuf) /* ima_rdwr_violation possibly pre-fetched */ in mmap_violation_check()
119 *pathname = ima_d_path(&file->f_path, pathbuf, in mmap_violation_check()
131 * - Openin
145 fmode_t mode = file->f_mode; ima_rdwr_violation_check() local
209 fmode_t mode = file->f_mode; ima_check_last_writer() local
[all...]
/linux/drivers/net/ethernet/qualcomm/ppe/
H A Dppe_config.h1 /* SPDX-License-Identifier: GPL-2.0-only
36 * enum ppe_scheduler_frame_mode - PPE scheduler frame mode.
50 * struct ppe_scheduler_cfg - PPE scheduler configuration.
55 * @unit_is_packet: Packet based or byte based unit for scheduled traffic.
56 * @frame_mode: Packet mode t
[all...]
/linux/Documentation/driver-api/backlight/
H A Dlp855x-driver.rst15 -----------
26 Backlight control mode.
28 Value: pwm based or register based
37 ------------------------
49 Only valid when brightness is pwm input mode.
58 1) lp8552 platform data: i2c register mode with new eeprom data::
68 .name = "lcd-bl",
75 2) lp8556 platform data: pwm input mode with default rom data::
/linux/drivers/platform/x86/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 x86 platforms, including vendor-specific laptop extension drivers.
24 Say Y here if you want to be able to read a firmware-embedded
29 be called wmi-bmof.
42 control, fn-lock, mic-mute LED, and other extra features.
45 will be called huawei-wmi.
78 system with an EC-driven backlight.
81 called nvidia-wmi-ec-backlight.
88 Say Y here if you want to support WMI-based keys on Xiaomi notebooks.
91 be called xiaomi-wmi.
[all …]
/linux/Documentation/devicetree/bindings/spi/
H A Dbrcm,bcm63xx-hsspi.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - William Zhang <william.zhang@broadcom.com>
11 - Kursad Oney <kursad.oney@broadcom.com>
12 - Jonas Gorski <jonas.gorski@gmail.com>
16 early MIPS based chips such as BCM6328 and BCM63268. This initial rev 1.0
17 controller was carried over to recent ARM based chips, such as BCM63138,
18 BCM4908 and BCM6858. The old MIPS based chip should continue to use the
[all …]
/linux/arch/alpha/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
81 The Alpha is a 64-bit general-purpose processor designed and
83 now Hewlett-Packard. The Alpha Linux project has a home page at
138 Alcor/Alpha-XLT AlphaStation 500, Alpha XL 366, 433
142 LX164 AlphaPC164-LX
152 Ruffian RPX164-2, AlphaPC164-U
[all...]
/linux/net/dsa/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
22 tristate "No-op tag driver"
28 tristate "Tag driver for Atheros AR9331 SoC with built-in switch"
31 the Atheros AR9331 SoC with built-in switch.
38 tristate "Tag driver for Broadcom switches using in-frame headers"
45 tristate "Tag driver for BCM63xx legacy switches using in-frame headers"
55 tristate "Tag driver for BCM53xx legacy switches using in-fram
[all...]

12345678910>>...43