Home
last modified time | relevance | path

Searched full:mmcc (Results 1 – 25 of 52) sorted by relevance

123

/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sdm660-camss.yaml228 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
233 clocks = <&mmcc CAMSS_AHB_CLK>,
234 <&mmcc CAMSS_CPHY_CSID0_CLK>,
235 <&mmcc CAMSS_CPHY_CSID1_CLK>,
236 <&mmcc CAMSS_CPHY_CSID2_CLK>,
237 <&mmcc CAMSS_CPHY_CSID3_CLK>,
238 <&mmcc CAMSS_CSI0_AHB_CLK>,
239 <&mmcc CAMSS_CSI0_CLK>,
240 <&mmcc CAMSS_CPHY_CSID0_CLK>,
241 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
H A Dqcom,msm8996-camss.yaml222 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
227 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
228 <&mmcc CAMSS_ISPIF_AHB_CLK>,
229 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
230 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
231 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
232 <&mmcc CAMSS_CSI0_AHB_CLK>,
233 <&mmcc CAMSS_CSI0_CLK>,
234 <&mmcc CAMSS_CSI0PHY_CLK>,
235 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
H A Dqcom,sdm660-venus.yaml108 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
114 clocks = <&mmcc VIDEO_CORE_CLK>,
115 <&mmcc VIDEO_AHB_CLK>,
116 <&mmcc VIDEO_AXI_CLK>,
117 <&mmcc THROTTLE_VIDEO_AXI_CLK>;
144 power-domains = <&mmcc VENUS_GDSC>;
148 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
150 power-domains = <&mmcc VENUS_CORE0_GDSC>;
155 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
157 power-domains = <&mmcc VENUS_CORE0_GDSC>;
H A Dqcom,msm8996-venus.yaml110 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
116 clocks = <&mmcc VIDEO_CORE_CLK>,
117 <&mmcc VIDEO_AHB_CLK>,
118 <&mmcc VIDEO_AXI_CLK>,
119 <&mmcc VIDEO_MAXI_CLK>;
121 power-domains = <&mmcc VENUS_GDSC>;
146 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
148 power-domains = <&mmcc VENUS_CORE0_GDSC>;
153 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
155 power-domains = <&mmcc VENUS_CORE1_GDSC>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,mmcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
24 - qcom,mmcc-msm8960
25 - qcom,mmcc-msm8974
26 - qcom,mmcc-msm8992
27 - qcom,mmcc-msm8994
28 - qcom,mmcc
[all...]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,msm8998-mdss.yaml72 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
82 clocks = <&mmcc MDSS_AHB_CLK>,
83 <&mmcc MDSS_AXI_CLK>,
84 <&mmcc MDSS_MDP_CLK>;
95 power-domains = <&mmcc MDSS_GDSC>;
106 clocks = <&mmcc MDSS_AHB_CLK>,
107 <&mmcc MDSS_AXI_CLK>,
108 <&mmcc MNOC_AHB_CLK>,
109 <&mmcc MDSS_MDP_CLK>,
110 <&mmcc MDSS_VSYNC_CL
[all...]
H A Dedp.txt11 - power-domains: Should be <&mmcc MDSS_GDSC>.
38 power-domains = <&mmcc MDSS_GDSC>;
46 <&mmcc MDSS_EDPAUX_CLK>,
47 <&mmcc MDSS_EDPPIXEL_CLK>,
48 <&mmcc MDSS_AHB_CLK>,
49 <&mmcc MDSS_EDPLINK_CLK>,
50 <&mmcc MDSS_MDP_CLK>;
H A Ddpu-msm8998.yaml158 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
167 clocks = <&mmcc MDSS_AHB_CLK>,
168 <&mmcc MDSS_AXI_CLK>,
169 <&mmcc MDSS_MDP_CLK>;
180 power-domains = <&mmcc MDSS_GDSC>;
191 clocks = <&mmcc MDSS_AHB_CLK>,
192 <&mmcc MDSS_AXI_CLK>,
193 <&mmcc MNOC_AHB_CLK>,
194 <&mmcc MDSS_MDP_CLK>,
195 <&mmcc MDSS_VSYNC_CLK>;
H A Ddsi.txt11 - power-domains: Should be <&mmcc MDSS_GDSC>.
109 - power-domains: Should be <&mmcc MDSS_GDSC>.
155 power-domains = <&mmcc MDSS_GDSC>;
165 <&mmcc MDSS_AXI_CLK>,
166 <&mmcc MDSS_BYTE0_CLK>,
167 <&mmcc MDSS_ESC0_CLK>,
168 <&mmcc MMSS_MISC_AHB_CLK>,
169 <&mmcc MDSS_AHB_CLK>,
170 <&mmcc MDSS_MDP_CLK>,
171 <&mmcc MDSS_PCLK0_CLK>;
[all …]
H A Dhdmi.txt14 - power-domains: Should be <&mmcc MDSS_GDSC>.
50 - power-domains: Should be <&mmcc MDSS_GDSC>.
65 power-domains = <&mmcc MDSS_GDSC>;
71 <&mmcc HDMI_APP_CLK>,
72 <&mmcc HDMI_M_AHB_CLK>,
73 <&mmcc HDMI_S_AHB_CLK>;
94 power-domains = <&mmcc MDSS_GDSC>;
96 clocks = <&mmcc HDMI_S_AHB_CLK>;
H A Dmdp4.yaml88 <&mmcc 77>,
89 <&mmcc 86>,
90 <&mmcc 102>,
91 <&mmcc 75>,
92 <&mmcc 97>,
93 <&mmcc 12>;
H A Dqcom,msm8998-dpu.yaml59 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
70 clocks = <&mmcc MDSS_AHB_CLK>,
71 <&mmcc MDSS_AXI_CLK>,
72 <&mmcc MNOC_AHB_CLK>,
73 <&mmcc MDSS_MDP_CLK>,
74 <&mmcc MDSS_VSYNC_CLK>;
H A Dmdp4.txt77 <&mmcc MDP_CLK>,
78 <&mmcc MDP_AHB_CLK>,
79 <&mmcc MDP_AXI_CLK>,
80 <&mmcc MDP_LUT_CLK>,
81 <&mmcc HDMI_TV_CLK>,
82 <&mmcc MDP_TV_CLK>;
H A Dhdmi.yaml207 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
223 clocks = <&mmcc MDSS_MDP_CLK>,
224 <&mmcc MDSS_AHB_CLK>,
225 <&mmcc MDSS_HDMI_CLK>,
226 <&mmcc MDSS_HDMI_AHB_CLK>,
227 <&mmcc MDSS_EXTPCLK_CLK>;
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm660.dtsi171 assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
172 <&mmcc PCLK1_CLK_SRC>;
176 clocks = <&mmcc MDSS_MDP_CLK>,
177 <&mmcc MDSS_BYTE1_CLK>,
178 <&mmcc MDSS_BYTE1_INTF_CLK>,
179 <&mmcc MNOC_AHB_CLK>,
180 <&mmcc MDSS_AHB_CLK>,
181 <&mmcc MDSS_AXI_CLK>,
182 <&mmcc MISC_AHB_CLK>,
183 <&mmcc MDSS_PCLK1_CLK>,
[all …]
H A Dsdm630.dtsi9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
693 clocks = <&mmcc AHB_CLK_SRC>;
1520 mmcc: clock-controller@c8c0000 { label
1521 compatible = "qcom,mmcc-sdm630";
1554 power-domains = <&mmcc MDSS_GDSC>;
1556 clocks = <&mmcc MDSS_AHB_CLK>,
1557 <&mmcc MDSS_AXI_CLK>,
1558 <&mmcc MDSS_VSYNC_CLK>,
1559 <&mmcc MDSS_MDP_CLK>;
1583 assigned-clocks = <&mmcc MDSS_MDP_CLK>,
[all …]
H A Dmsm8996.dtsi8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
906 clocks = <&mmcc AHB_CLK_SRC>;
931 mmcc: clock-controller@8c0000 { label
932 compatible = "qcom,mmcc-msm8996";
953 assigned-clocks = <&mmcc MMPLL9_PLL>,
954 <&mmcc MMPLL1_PLL>,
955 <&mmcc MMPLL3_PLL>,
956 <&mmcc MMPLL4_PLL>,
957 <&mmcc MMPLL5_PLL>;
975 power-domains = <&mmcc MDSS_GDSC>;
[all …]
H A Dmsm8996-xiaomi-scorpio.dts35 clocks = <&mmcc MDSS_MDP_CLK>,
36 <&mmcc MMSS_MMAGIC_AHB_CLK>,
37 <&mmcc MDSS_AHB_CLK>,
38 <&mmcc MDSS_AXI_CLK>,
39 <&mmcc MMSS_MISC_AHB_CLK>,
40 <&mmcc MDSS_BYTE0_CLK>,
41 <&mmcc MDSS_PCLK0_CLK>,
42 <&mmcc MDSS_ESC0_CLK>,
43 <&mmcc SMMU_MDP_AHB_CLK>,
44 <&mmcc SMMU_MDP_AXI_CLK>;
[all …]
H A Dmsm8996pro-xiaomi-scorpio.dts36 clocks = <&mmcc MDSS_MDP_CLK>,
37 <&mmcc MMSS_MMAGIC_AHB_CLK>,
38 <&mmcc MDSS_AHB_CLK>,
39 <&mmcc MDSS_AXI_CLK>,
40 <&mmcc MMSS_MISC_AHB_CLK>,
41 <&mmcc MDSS_BYTE0_CLK>,
42 <&mmcc MDSS_PCLK0_CLK>,
43 <&mmcc MDSS_ESC0_CLK>,
44 <&mmcc SMMU_MDP_AHB_CLK>,
45 <&mmcc SMMU_MDP_AXI_CLK>;
[all …]
H A Dmsm8992-xiaomi-libra.dts50 clocks = <&mmcc MDSS_AHB_CLK>,
51 <&mmcc MDSS_AXI_CLK>,
52 <&mmcc MDSS_VSYNC_CLK>,
53 <&mmcc MDSS_MDP_CLK>,
54 <&mmcc MDSS_BYTE0_CLK>,
55 <&mmcc MDSS_PCLK0_CLK>,
56 <&mmcc MDSS_ESC0_CLK>;
57 power-domains = <&mmcc MDSS_GDSC>;
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8064.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
727 mmcc: clock-controller@4000000 { label
728 compatible = "qcom,mmcc-apq8064";
1006 <&mmcc GFX3D_CLK>,
1007 <&mmcc GFX3D_AHB_CLK>,
1008 <&mmcc GFX3D_AXI_CLK>,
1009 <&mmcc MMSS_IMEM_AHB_CLK>;
1105 clocks = <&mmcc DSI_M_AHB_CLK>,
1106 <&mmcc DSI_S_AHB_CLK>,
1107 <&mmcc AMP_AHB_CLK>,
[all …]
H A Dqcom-msm8226.dtsi10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
974 mmcc: clock-controller@fd8c0000 { label
975 compatible = "qcom,mmcc-msm8226";
1002 power-domains = <&mmcc MDSS_GDSC>;
1004 clocks = <&mmcc MDSS_AHB_CLK>,
1005 <&mmcc MDSS_AXI_CLK>,
1006 <&mmcc MDSS_VSYNC_CLK>;
1030 clocks = <&mmcc MDSS_AHB_CLK>,
1031 <&mmcc MDSS_AXI_CLK>,
1032 <&mmcc MDSS_MDP_CLK>,
[all …]
H A Dqcom-msm8974.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
1154 clocks = <&mmcc MMSS_S0_AXI_CLK>,
1155 <&mmcc MMSS_S0_AXI_CLK>;
1863 mmcc: clock-controller@fd8c0000 { label
1864 compatible = "qcom,mmcc-msm8974";
1900 power-domains = <&mmcc MDSS_GDSC>;
1902 clocks = <&mmcc MDSS_AHB_CLK>,
1903 <&mmcc MDSS_AXI_CLK>,
1904 <&mmcc MDSS_VSYNC_CLK>;
1926 clocks = <&mmcc MDSS_AHB_CLK>,
[all …]
H A Dqcom-msm8226-microsoft-common.dtsi43 clocks = <&mmcc MDSS_AHB_CLK>,
44 <&mmcc MDSS_AXI_CLK>,
45 <&mmcc MDSS_BYTE0_CLK>,
46 <&mmcc MDSS_MDP_CLK>,
47 <&mmcc MDSS_PCLK0_CLK>,
48 <&mmcc MDSS_VSYNC_CLK>;
49 power-domains = <&mmcc MDSS_GDSC>;
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-qcom-cci.txt71 clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
72 <&mmcc CAMSS_TOP_AHB_CLK>,
73 <&mmcc CAMSS_CCI_AHB_CLK>,
74 <&mmcc CAMSS_CCI_CLK>,
75 <&mmcc CAMSS_AHB_CLK>;

123