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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sdm660-camss.yaml247 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
252 clocks = <&mmcc CAMSS_AHB_CLK>,
253 <&mmcc CAMSS_CPHY_CSID0_CLK>,
254 <&mmcc CAMSS_CPHY_CSID1_CLK>,
255 <&mmcc CAMSS_CPHY_CSID2_CLK>,
256 <&mmcc CAMSS_CPHY_CSID3_CLK>,
257 <&mmcc CAMSS_CSI0_AHB_CLK>,
258 <&mmcc CAMSS_CSI0_CLK>,
259 <&mmcc CAMSS_CPHY_CSID0_CLK>,
260 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
H A Dqcom,msm8996-camss.yaml241 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
246 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
247 <&mmcc CAMSS_ISPIF_AHB_CLK>,
248 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
249 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
250 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
251 <&mmcc CAMSS_CSI0_AHB_CLK>,
252 <&mmcc CAMSS_CSI0_CLK>,
253 <&mmcc CAMSS_CSI0PHY_CLK>,
254 <&mmcc CAMSS_CSI0PIX_CLK>,
[all …]
H A Dqcom,sdm660-venus.yaml108 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
114 clocks = <&mmcc VIDEO_CORE_CLK>,
115 <&mmcc VIDEO_AHB_CLK>,
116 <&mmcc VIDEO_AXI_CLK>,
117 <&mmcc THROTTLE_VIDEO_AXI_CLK>;
144 power-domains = <&mmcc VENUS_GDSC>;
148 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
150 power-domains = <&mmcc VENUS_CORE0_GDSC>;
155 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
157 power-domains = <&mmcc VENUS_CORE0_GDSC>;
H A Dqcom,msm8996-venus.yaml110 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
116 clocks = <&mmcc VIDEO_CORE_CLK>,
117 <&mmcc VIDEO_AHB_CLK>,
118 <&mmcc VIDEO_AXI_CLK>,
119 <&mmcc VIDEO_MAXI_CLK>;
121 power-domains = <&mmcc VENUS_GDSC>;
146 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
148 power-domains = <&mmcc VENUS_CORE0_GDSC>;
153 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
155 power-domains = <&mmcc VENUS_CORE1_GDSC>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,mmcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
24 - qcom,mmcc-msm8960
25 - qcom,mmcc-msm8974
26 - qcom,mmcc-msm8992
27 - qcom,mmcc-msm8994
28 - qcom,mmcc-msm8996
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,msm8998-mdss.yaml72 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
82 clocks = <&mmcc MDSS_AHB_CLK>,
83 <&mmcc MDSS_AXI_CLK>,
84 <&mmcc MDSS_MDP_CLK>;
95 power-domains = <&mmcc MDSS_GDSC>;
106 clocks = <&mmcc MDSS_AHB_CLK>,
107 <&mmcc MDSS_AXI_CLK>,
108 <&mmcc MNOC_AHB_CLK>,
109 <&mmcc MDSS_MDP_CLK>,
110 <&mmcc MDSS_VSYNC_CL
[all...]
H A Dedp.txt11 - power-domains: Should be <&mmcc MDSS_GDSC>.
38 power-domains = <&mmcc MDSS_GDSC>;
46 <&mmcc MDSS_EDPAUX_CLK>,
47 <&mmcc MDSS_EDPPIXEL_CLK>,
48 <&mmcc MDSS_AHB_CLK>,
49 <&mmcc MDSS_EDPLINK_CLK>,
50 <&mmcc MDSS_MDP_CLK>;
H A Ddpu-msm8998.yaml158 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
167 clocks = <&mmcc MDSS_AHB_CLK>,
168 <&mmcc MDSS_AXI_CLK>,
169 <&mmcc MDSS_MDP_CLK>;
180 power-domains = <&mmcc MDSS_GDSC>;
191 clocks = <&mmcc MDSS_AHB_CLK>,
192 <&mmcc MDSS_AXI_CLK>,
193 <&mmcc MNOC_AHB_CLK>,
194 <&mmcc MDSS_MDP_CLK>,
195 <&mmcc MDSS_VSYNC_CLK>;
H A Ddsi.txt11 - power-domains: Should be <&mmcc MDSS_GDSC>.
109 - power-domains: Should be <&mmcc MDSS_GDSC>.
155 power-domains = <&mmcc MDSS_GDSC>;
165 <&mmcc MDSS_AXI_CLK>,
166 <&mmcc MDSS_BYTE0_CLK>,
167 <&mmcc MDSS_ESC0_CLK>,
168 <&mmcc MMSS_MISC_AHB_CLK>,
169 <&mmcc MDSS_AHB_CLK>,
170 <&mmcc MDSS_MDP_CLK>,
171 <&mmcc MDSS_PCLK0_CLK>;
[all …]
H A Dhdmi.txt14 - power-domains: Should be <&mmcc MDSS_GDSC>.
50 - power-domains: Should be <&mmcc MDSS_GDSC>.
65 power-domains = <&mmcc MDSS_GDSC>;
71 <&mmcc HDMI_APP_CLK>,
72 <&mmcc HDMI_M_AHB_CLK>,
73 <&mmcc HDMI_S_AHB_CLK>;
94 power-domains = <&mmcc MDSS_GDSC>;
96 clocks = <&mmcc HDMI_S_AHB_CLK>;
H A Dqcom,msm8998-dpu.yaml59 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
70 clocks = <&mmcc MDSS_AHB_CLK>,
71 <&mmcc MDSS_AXI_CLK>,
72 <&mmcc MNOC_AHB_CLK>,
73 <&mmcc MDSS_MDP_CLK>,
74 <&mmcc MDSS_VSYNC_CLK>;
H A Dmdp4.txt77 <&mmcc MDP_CLK>,
78 <&mmcc MDP_AHB_CLK>,
79 <&mmcc MDP_AXI_CLK>,
80 <&mmcc MDP_LUT_CLK>,
81 <&mmcc HDMI_TV_CLK>,
82 <&mmcc MDP_TV_CLK>;
H A Dmdp4.yaml95 <&mmcc 77>,
96 <&mmcc 86>,
97 <&mmcc 102>,
98 <&mmcc 75>,
99 <&mmcc 97>,
100 <&mmcc 12>;
H A Dhdmi.yaml192 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
208 clocks = <&mmcc MDSS_MDP_CLK>,
209 <&mmcc MDSS_AHB_CLK>,
210 <&mmcc MDSS_HDMI_CLK>,
211 <&mmcc MDSS_HDMI_AHB_CLK>,
212 <&mmcc MDSS_EXTPCLK_CLK>;
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm660.dtsi171 assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
172 <&mmcc PCLK1_CLK_SRC>;
176 clocks = <&mmcc MDSS_MDP_CLK>,
177 <&mmcc MDSS_BYTE1_CLK>,
178 <&mmcc MDSS_BYTE1_INTF_CLK>,
179 <&mmcc MNOC_AHB_CLK>,
180 <&mmcc MDSS_AHB_CLK>,
181 <&mmcc MDSS_AXI_CLK>,
182 <&mmcc MISC_AHB_CLK>,
183 <&mmcc MDSS_PCLK1_CLK>,
[all …]
H A Dsdm630.dtsi10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
698 clocks = <&mmcc AHB_CLK_SRC>;
1531 mmcc: clock-controller@c8c0000 { label
1532 compatible = "qcom,mmcc-sdm630";
1565 power-domains = <&mmcc MDSS_GDSC>;
1567 clocks = <&mmcc MDSS_AHB_CLK>,
1568 <&mmcc MDSS_AXI_CLK>,
1569 <&mmcc MDSS_VSYNC_CLK>,
1570 <&mmcc MDSS_MDP_CLK>;
1594 assigned-clocks = <&mmcc MDSS_MDP_CLK>,
[all …]
H A Dmsm8996.dtsi9 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
907 clocks = <&mmcc AHB_CLK_SRC>;
932 mmcc: clock-controller@8c0000 { label
933 compatible = "qcom,mmcc-msm8996";
954 assigned-clocks = <&mmcc MMPLL9_PLL>,
955 <&mmcc MMPLL1_PLL>,
956 <&mmcc MMPLL3_PLL>,
957 <&mmcc MMPLL4_PLL>,
958 <&mmcc MMPLL5_PLL>;
976 power-domains = <&mmcc MDSS_GDSC>;
[all …]
H A Dmsm8998.dtsi8 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
2791 mmcc: clock-controller@c8c0000 { label
2792 compatible = "qcom,mmcc-msm8998";
2829 clocks = <&mmcc MDSS_AHB_CLK>,
2830 <&mmcc MDSS_AXI_CLK>,
2831 <&mmcc MDSS_MDP_CLK>;
2836 power-domains = <&mmcc MDSS_GDSC>;
2859 clocks = <&mmcc MDSS_AHB_CLK>,
2860 <&mmcc MDSS_AXI_CLK>,
2861 <&mmcc MNOC_AHB_CLK>,
[all …]
H A Dmsm8996-xiaomi-scorpio.dts35 clocks = <&mmcc MDSS_MDP_CLK>,
36 <&mmcc MMSS_MMAGIC_AHB_CLK>,
37 <&mmcc MDSS_AHB_CLK>,
38 <&mmcc MDSS_AXI_CLK>,
39 <&mmcc MMSS_MISC_AHB_CLK>,
40 <&mmcc MDSS_BYTE0_CLK>,
41 <&mmcc MDSS_PCLK0_CLK>,
42 <&mmcc MDSS_ESC0_CLK>,
43 <&mmcc SMMU_MDP_AHB_CLK>,
44 <&mmcc SMMU_MDP_AXI_CLK>;
[all …]
H A Dmsm8996pro-xiaomi-scorpio.dts36 clocks = <&mmcc MDSS_MDP_CLK>,
37 <&mmcc MMSS_MMAGIC_AHB_CLK>,
38 <&mmcc MDSS_AHB_CLK>,
39 <&mmcc MDSS_AXI_CLK>,
40 <&mmcc MMSS_MISC_AHB_CLK>,
41 <&mmcc MDSS_BYTE0_CLK>,
42 <&mmcc MDSS_PCLK0_CLK>,
43 <&mmcc MDSS_ESC0_CLK>,
44 <&mmcc SMMU_MDP_AHB_CLK>,
45 <&mmcc SMMU_MDP_AXI_CLK>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8064.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
758 mmcc: clock-controller@4000000 { label
759 compatible = "qcom,mmcc-apq8064";
1039 <&mmcc GFX3D_CLK>,
1040 <&mmcc GFX3D_AHB_CLK>,
1041 <&mmcc GFX3D_AXI_CLK>,
1042 <&mmcc MMSS_IMEM_AHB_CLK>;
1138 clocks = <&mmcc DSI_M_AHB_CLK>,
1139 <&mmcc DSI_S_AHB_CLK>,
1140 <&mmcc AMP_AHB_CLK>,
[all …]
H A Dqcom-msm8974.dtsi8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
1155 clocks = <&mmcc MMSS_S0_AXI_CLK>,
1156 <&mmcc MMSS_S0_AXI_CLK>;
1864 mmcc: clock-controller@fd8c0000 { label
1865 compatible = "qcom,mmcc-msm8974";
1901 power-domains = <&mmcc MDSS_GDSC>;
1903 clocks = <&mmcc MDSS_AHB_CLK>,
1904 <&mmcc MDSS_AXI_CLK>,
1905 <&mmcc MDSS_VSYNC_CLK>;
1927 clocks = <&mmcc MDSS_AHB_CLK>,
[all …]
H A Dqcom-msm8226.dtsi11 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
1130 mmcc: clock-controller@fd8c0000 { label
1131 compatible = "qcom,mmcc-msm8226";
1158 power-domains = <&mmcc MDSS_GDSC>;
1160 clocks = <&mmcc MDSS_AHB_CLK>,
1161 <&mmcc MDSS_AXI_CLK>,
1162 <&mmcc MDSS_VSYNC_CLK>;
1186 clocks = <&mmcc MDSS_AHB_CLK>,
1187 <&mmcc MDSS_AXI_CLK>,
1188 <&mmcc MDSS_MDP_CLK>,
[all …]
H A Dmsm8226-motorola-falcon.dts34 clocks = <&mmcc MDSS_AHB_CLK>,
35 <&mmcc MDSS_AXI_CLK>,
36 <&mmcc MDSS_BYTE0_CLK>,
37 <&mmcc MDSS_ESC0_CLK>,
38 <&mmcc MDSS_MDP_CLK>,
39 <&mmcc MMSS_MISC_AHB_CLK>,
40 <&mmcc MDSS_PCLK0_CLK>,
41 <&mmcc MDSS_VSYNC_CLK>;
42 power-domains = <&mmcc MDSS_GDSC>;
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-qcom-cci.txt71 clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
72 <&mmcc CAMSS_TOP_AHB_CLK>,
73 <&mmcc CAMSS_CCI_AHB_CLK>,
74 <&mmcc CAMSS_CCI_CLK>,
75 <&mmcc CAMSS_AHB_CLK>;

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