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Searched +full:mhu +full:- +full:rx (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/mailbox/
H A Darm,mhu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM MHU Mailbox Controller
10 - Jassi Brar <jaswinder.singh@linaro.org>
13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
14 independent channels/links to communicate with remote processor(s). MHU links
21 The MHU hardware also allows operations in doorbell mode. The MHU drives the
22 interrupt signal using a 32-bit register, with all 32-bits logically ORed
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/linux/arch/arm64/boot/dts/arm/
H A Djuno-scmi.dtsi3 power-domains = <&scmi_devpd 8>;
7 power-domains = <&scmi_devpd 8>;
11 power-domains = <&scmi_devpd 8>;
15 power-domains = <&scmi_devpd 8>;
19 power-domains = <&scmi_devpd 8>;
23 power-domains = <&scmi_devpd 8>;
27 power-domains = <&scmi_devpd 8>;
31 power-domains = <&scmi_devpd 8>;
42 /delete-node/ scpi;
47 mbox-names = "tx", "rx";
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H A Dmorello.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (c) 2020-2024, Arm Limited. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 soc_refclk50mhz: clock-50000000 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <50000000>;
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