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/linux/Documentation/devicetree/bindings/iio/adc/
H A Damlogic,meson-saradc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
18 - const: amlogic,meson-saradc
19 - items:
20 - enum:
21 - amlogic,meson8-saradc
22 - amlogic,meson8b-saradc
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/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8b.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
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H A Dmeson8m2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
19 /delete-node/ video-lut@20;
21 canvas: video-lut@48 {
22 compatible = "amlogic,meson8m2-canvas", "amlogic,canvas";
28 compatible = "amlogic,meson8m2-dwmac", "snps,dwmac";
35 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
37 reset-names = "stmmaceth";
41 compatible = "amlogic,meson8m2-aobus-pinctrl",
42 "amlogic,meson8-aobus-pinctrl";
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H A Dmeson8b-mxq.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
11 #include "meson8b.dtsi"
15 compatible = "tronfy,mxq", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 vcck: regulator-vcck {
31 compatible = "pwm-regulator";
33 regulator-name = "VCCK";
34 regulator-min-microvolt = <860000>;
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H A Dmeson8.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include <dt-bindings/power/meson8-power.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
20 #address-cells = <1>;
21 #size-cells = <0>;
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H A Dmeson8b-odroidc1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include "meson8b.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Hardkernel ODROID-C1";
13 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
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H A Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
11 #include "meson8b.dtsi"
15 compatible = "endless,ec100", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
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/linux/drivers/soc/amlogic/
H A Dmeson-clk-measure.c1 // SPDX-License-Identifier: GPL-2.0+
549 CLK_MSR_ID(111, "saradc"),
793 struct meson_msr *priv = clk_msr_id->priv; in meson_measure_id()
794 const struct msr_reg_offset *reg = priv->data.reg; in meson_measure_id()
802 regmap_write(priv->regmap, reg->freq_ctrl, 0); in meson_measure_id()
805 regmap_update_bits(priv->regmap, reg->freq_ctrl, MSR_DURATION, in meson_measure_id()
806 FIELD_PREP(MSR_DURATION, duration - 1)); in meson_measure_id()
809 regmap_update_bits(priv->regmap, reg->freq_ctrl, MSR_CLK_SRC, in meson_measure_id()
810 FIELD_PREP(MSR_CLK_SRC, clk_msr_id->id)); in meson_measure_id()
813 regmap_update_bits(priv->regmap, reg->freq_ctrl, in meson_measure_id()
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