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/linux/Documentation/devicetree/bindings/arm/amlogic/
H A Damlogic,meson-mx-secbus2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
14 contains registers for various IP blocks such as pin-controller bits for
23 - enum:
24 - amlogic,meson8-secbus2
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Damlogic,meson-mx-ao-arc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/amlogic,meson-mx-ao-arc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Amlogic Meson6, Meson8, Meson8b and Meson8m2 SoCs embed an ARC core
11 controller for always-on operations, typically used for managing
13 ISA, while Meson8, Meson8b and Meson8m2 use an ARC EM4 (ARCv2 ISA)
17 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
22 - enum:
23 - amlogic,meson8-ao-arc
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/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include <dt-bindings/power/meson8-power.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
16 model = "Amlogic Meson8 SoC";
17 compatible = "amlogic,meson8";
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H A Dmeson8b.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
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/linux/drivers/remoteproc/
H A Dmeson_mx_ao_arc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
60 struct meson_mx_ao_arc_rproc_priv *priv = rproc->priv; in meson_mx_ao_arc_rproc_start()
65 ret = clk_prepare_enable(priv->arc_pclk); in meson_mx_ao_arc_rproc_start()
70 priv->sram_pa >> 14); in meson_mx_ao_arc_rproc_start()
71 writel(tmp, priv->remap_base + AO_REMAP_REG0); in meson_mx_ao_arc_rproc_start()
78 * same. (At least) For Meson8 and newer that bit must not be set. in meson_mx_ao_arc_rproc_start()
80 writel(0x0, priv->remap_base + AO_REMAP_REG1); in meson_mx_ao_arc_rproc_start()
82 regmap_update_bits(priv->secbus2_regmap, AO_SECURE_REG0, in meson_mx_ao_arc_rproc_start()
85 priv->sram_pa >> 12)); in meson_mx_ao_arc_rproc_start()
87 ret = reset_control_reset(priv->arc_reset); in meson_mx_ao_arc_rproc_start()
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