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/linux/drivers/pwm/
H A Dpwm-meson.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * PWM controller driver for Amlogic Meson SoCs.
13 * Setting the duty cycle will disable and re-enable the PWM output.
19 * https://dl.khadas.com/Hardware/VIM2/Datasheet/S912_Datasheet_V0.220170314publicversion-Wesion.pdf
23 * https://dn.odroid.com/S922X/ODROID-N2/Datasheet/S922X_Public_Datasheet_V0.2.pdf
33 #include <linux/clk-provider.h>
136 struct meson_pwm *meson = to_meson_pwm(chip); in meson_pwm_request() local
137 struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm]; in meson_pwm_request()
138 struct device *dev = pwmchip_parent(chip); in meson_pwm_request()
141 err = clk_prepare_enable(channel->clk); in meson_pwm_request()
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/linux/Documentation/devicetree/bindings/power/
H A Damlogic,meson-gx-pwrc.txt1 Amlogic Meson Power Controller (deprecated)
4 The Amlogic Meson SoCs embeds an internal Power domain controller.
7 ----------------
13 power-domain.yaml
15 Device Tree Bindings:
16 ---------------------
19 - compatible: should be one of the following :
20 - "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs
21 - "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs
22 - #power-domain-cells: should be 0
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/linux/Documentation/devicetree/bindings/mtd/
H A Damlogic,meson-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml
13 - liang.yang@amlogic.com
18 - amlogic,meson-gxl-nfc
19 - amlogic,meson-axg-nfc
24 reg-names:
26 - const: nfc
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/linux/drivers/gpu/drm/meson/
H A Dmeson_drv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/soc/amlogic/meson-canvas.h>
43 #define DRIVER_NAME "meson"
44 #define DRIVER_DESC "Amlogic Meson DRM driver"
54 * - Full reset of entire video processing HW blocks
55 * - Scaling and setup of the VPU clock
56 * - Bus clock gates
57 * - Powering up video processing HW blocks
58 * - Powering Up HDMI controller and PHY
74 struct meson_drm *priv = dev->dev_private; in meson_irq()
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H A Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
32 #define DRIVER_NAME "meson-dw-hdmi"
33 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
40 * - A Synopsys DesignWare HDMI Controller IP
41 * - A TOP control block controlling the Clocks and PHY
42 * - A custom HDMI PHY in order convert video to TMDS signal
79 * - HPD Rise & Fall interrupt
80 * - HDMI Controller Interrupt
81 * - HDMI PHY Init for 480i to 1080p60
82 * - VENC & HDMI Clock setup for 480i to 1080p60
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/linux/drivers/reset/amlogic/
H A Dreset-meson.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Amlogic Meson Reset Controller driver
5 * Copyright (c) 2016-2024 BayLibre, SAS.
16 #include <linux/reset-controller.h>
18 #include "reset-meson.h"
52 { .compatible = "amlogic,meson8b-reset", .data = &meson8b_param},
53 { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param},
54 { .compatible = "amlogic,meson-axg-reset", .data = &meson8b_param},
55 { .compatible = "amlogic,meson-a1-reset", .data = &meson_a1_param},
56 { .compatible = "amlogic,meson-s4-reset", .data = &meson_s4_param},
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H A Dreset-meson-common.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Amlogic Meson Reset core functions
5 * Copyright (c) 2016-2024 BayLibre, SAS.
10 #include <linux/device.h>
13 #include <linux/reset-controller.h>
15 #include "reset-meson.h"
28 unsigned int stride = regmap_get_reg_stride(data->map); in meson_reset_offset_and_bit()
42 offset += data->param->reset_offset; in meson_reset_reset()
44 return regmap_write(data->map, offset, BIT(bit)); in meson_reset_reset()
55 offset += data->param->level_offset; in meson_reset_level()
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H A Dreset-meson-audio-arb.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 #include <linux/reset-controller.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
67 spin_lock(&arb->lock); in meson_audio_arb_update()
68 val = readl(arb->regs); in meson_audio_arb_update()
71 val &= ~BIT(arb->reset_bits[id]); in meson_audio_arb_update()
73 val |= BIT(arb->reset_bits[id]); in meson_audio_arb_update()
75 writel(val, arb->regs); in meson_audio_arb_update()
76 spin_unlock(&arb->lock); in meson_audio_arb_update()
88 val = readl(arb->regs); in meson_audio_arb_status()
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/linux/Documentation/devicetree/bindings/reset/
H A Damlogic,meson-axg-audio-arb.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/reset/amlogic,meson-axg-audio-arb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jerome Brunet <jbrunet@baylibre.com>
13 description: The Amlogic Audio ARB is a simple device which enables or disables
19 - amlogic,meson-axg-audio-arb
20 - amlogic,meson-sm1-audio-arb
31 "#reset-cells":
35 - compatible
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/linux/drivers/nvmem/
H A Dmeson-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Amlogic Meson GX eFuse Driver
11 #include <linux/nvmem-provider.h>
15 #include <linux/firmware/meson/meson_sm.h>
42 { .compatible = "amlogic,meson-gxbb-efuse", },
49 struct device *dev = &pdev->dev; in meson_efuse_probe()
56 of_parse_phandle(pdev->dev.of_node, "secure-monitor", 0); in meson_efuse_probe()
59 dev_err(&pdev->dev, "no secure-monitor node\n"); in meson_efuse_probe()
60 return -ENODEV; in meson_efuse_probe()
65 return -EPROBE_DEFER; in meson_efuse_probe()
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/linux/drivers/pinctrl/meson/
H A Dpinctrl-meson8-pmx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * First generation of pinmux driver for Amlogic Meson SoCs
13 #include <linux/device.h>
18 #include "pinctrl-meson.h"
19 #include "pinctrl-meson8-pmx.h"
22 * meson8_pmx_disable_other_groups() - disable other groups using a given pin
24 * @pc: meson pin controller device
26 * @sel_group: index of the selected group, or -1 if none
29 * selected one. If @sel_group is -1 all groups are disabled, leaving
39 for (i = 0; i < pc->data->num_groups; i++) { in meson8_pmx_disable_other_groups()
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H A Dpinctrl-meson-axg-pmx.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Second generation of pinmux driver for Amlogic Meson-AXG SoC.
14 * Meson-AXG SoC and later series, which use 4-width continuous
20 #include <linux/device.h>
25 #include "pinctrl-meson.h"
26 #include "pinctrl-meson-axg-pmx.h"
33 const struct meson_axg_pmx_data *pmx = pc->data->pmx_data; in meson_axg_pmx_get_bank()
35 for (i = 0; i < pmx->num_pmx_banks; i++) in meson_axg_pmx_get_bank()
36 if (pin >= pmx->pmx_banks[i].first && in meson_axg_pmx_get_bank()
37 pin <= pmx->pmx_banks[i].last) { in meson_axg_pmx_get_bank()
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/linux/drivers/char/hw_random/
H A Dmeson-rng.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
32 struct device *dev;
40 *(u32 *)buf = readl_relaxed(data->base + RNG_DATA); in meson_rng_read()
54 return -EBUSY; in meson_rng_wait_status()
64 void __iomem *cfg_addr = data->base + RNG_S4_CFG; in meson_s4_rng_read()
71 dev_err(data->dev, "Seed isn't ready, try again\n"); in meson_s4_rng_read()
77 dev_err(data->dev, "Can't get random number, try again\n"); in meson_s4_rng_read()
81 *(u32 *)buf = readl_relaxed(data->base + RNG_S4_DATA); in meson_s4_rng_read()
88 struct device *dev = &pdev->dev; in meson_rng_probe()
95 return -ENOMEM; in meson_rng_probe()
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/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-s4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/meson-s4-gpio.h>
10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h>
11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h>
12 #include <dt-bindings/power/meson-s4-power.h>
13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h>
17 #address-cells = <2>;
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H A Dmeson-axg-jethome-jethub-j110-rev-2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-axg-jethome-jethub-j1xx.dtsi"
13 compatible = "jethome,jethub-j110", "amlogic,a113d", "amlogic,meson-axg";
26 broken-cd;/* cd-gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;*/
32 compatible = "realtek,rtl8822cs-bt";
33 enable-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
34 host-wake-gpios = <&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
35 device-wake-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_HIGH>;
46 address-width = <0x10>;
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H A Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
13 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
14 #include <dt-bindings/thermal/thermal.h>
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/linux/drivers/watchdog/
H A Dmeson_gxbb_wdt.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
26 #define GXBB_WDT_CTRL_DIV_MASK (BIT(18) - 1)
28 #define GXBB_WDT_TCNT_SETUP_MASK (BIT(16) - 1)
55 writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN, in meson_gxbb_wdt_start()
56 data->reg_base + GXBB_WDT_CTRL_REG); in meson_gxbb_wdt_start()
65 writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN, in meson_gxbb_wdt_stop()
66 data->reg_base + GXBB_WDT_CTRL_REG); in meson_gxbb_wdt_stop()
75 writel(0, data->reg_base + GXBB_WDT_RSET_REG); in meson_gxbb_wdt_ping()
89 wdt_dev->timeout = timeout; in meson_gxbb_wdt_set_timeout()
93 writel(tcnt, data->reg_base + GXBB_WDT_TCNT_REG); in meson_gxbb_wdt_set_timeout()
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/linux/drivers/i2c/busses/
H A Di2c-meson.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C bus driver for Amlogic Meson SoCs
21 /* Meson I2C register map */
68 * struct meson_i2c - Meson I2C device private data
71 * @dev: Pointer to device structure
72 * @regs: Base address of the device memory mapped registers
82 * @tokens: Sequence of tokens to be written to the device
88 struct device *dev;
116 data = readl(i2c->regs + reg); in meson_i2c_set_mask()
119 writel(data, i2c->regs + reg); in meson_i2c_set_mask()
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/linux/drivers/media/rc/
H A Dmeson-ir-tx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * meson-ir-tx.c - Amlogic Meson IR TX driver
10 #include <linux/device.h>
20 #include <media/rc-core.h>
22 #define DEVICE_NAME "Meson IR TX"
23 #define DRIVER_NAME "meson-ir-tx"
39 #define IRB_DELAY_MASK (IRB_MAX_DELAY - 1)
51 #define IRB_MOD_COUNT(lo, hi) ((((lo) - 1) << 16) | ((hi) - 1))
66 struct device *dev;
81 unsigned int cnt = DIV_ROUND_CLOSEST(ir->clk_rate, ir->carrier); in meson_irtx_set_mod()
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H A Dmeson-ir.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Amlogic Meson IR remote receiver
8 #include <linux/device.h>
19 #include <media/rc-core.h>
21 #define DRIVER_NAME "meson-ir"
54 /* Meson 6b uses REG1 to configure IR mode */
57 /* The following registers are only available on Meson 8b and newer */
64 /* Meson 8b / GXBB use REG2 to configure IR mode */
97 * struct meson_ir_protocol - describe IR Protocol parameter
100 * @repeat_counter_enable: enable frame-to-frame time counter, it should work
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/linux/drivers/tty/serial/
H A Dmeson_uart.c1 // SPDX-License-Identifier: GPL-2.0
102 val = readl(port->membase + AML_UART_STATUS); in meson_uart_tx_empty()
111 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
113 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()
120 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
122 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()
130 free_irq(port->irq, port); in meson_uart_shutdown()
134 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
137 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_shutdown()
144 struct tty_port *tport = &port->state->port; in meson_uart_start_tx()
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/linux/drivers/rtc/
H A Drtc-meson-vrtc.c1 // SPDX-License-Identifier: GPL-2.0
20 static int meson_vrtc_read_time(struct device *dev, struct rtc_time *tm) in meson_vrtc_read_time()
34 writel_relaxed(time, vrtc->io_alarm); in meson_vrtc_set_wakeup_time()
37 static int meson_vrtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) in meson_vrtc_set_alarm()
41 dev_dbg(dev, "%s: alarm->enabled=%d\n", __func__, alarm->enabled); in meson_vrtc_set_alarm()
42 if (alarm->enabled) in meson_vrtc_set_alarm()
43 vrtc->alarm_time = rtc_tm_to_time64(&alarm->time); in meson_vrtc_set_alarm()
45 vrtc->alarm_time = 0; in meson_vrtc_set_alarm()
50 static int meson_vrtc_alarm_irq_enable(struct device *dev, unsigned int enabled) in meson_vrtc_alarm_irq_enable()
54 vrtc->enabled = enabled; in meson_vrtc_alarm_irq_enable()
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H A Drtc-meson.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/nvmem-provider.h>
46 /* rtc registers accessed via rtc-serial interface */
62 struct device *dev; /* device we bound from */
70 .name = "peripheral-registers",
77 /* RTC front-end serialiser controls */
82 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, 0); in meson_rtc_sclk_pulse()
84 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SCLK, in meson_rtc_sclk_pulse()
90 regmap_update_bits(rtc->peripheral, RTC_ADDR0, RTC_ADDR0_LINE_SDI, in meson_rtc_send_bit()
98 u32 bit = 1 << (nr - 1); in meson_rtc_send_bits()
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/linux/drivers/usb/dwc3/
H A Ddwc3-meson-g12a.c1 // SPDX-License-Identifier: GPL-2.0
11 * - Control registers for each USB2 Ports
12 * - Control registers for the USB PHY layer
13 * - SuperSpeed PHY can be enabled only if port is used
14 * - Dynamic OTG switching with ID change interrupt
33 /* USB2 Ports Control Registers, offsets are per-port */
120 "usb2-phy0", "usb2-phy1", "usb2-phy2",
124 "usb2-phy0", "usb2-phy1", "usb3-phy0",
133 * correctly when only the "usb2-phy1" phy is specified on-par with the
137 "usb2-phy0", "usb2-phy1"
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/linux/Documentation/devicetree/bindings/firmware/
H A Darm,scpi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
19 the SCPI provide for OSPM in the device tree.
33 - const: arm,scpi # SCPI v1.0 and above
34 - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0
35 - items:
36 - enum:
37 - amlogic,meson-gxbb-scpi
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