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/linux/drivers/memory/
H A Dpl353-smc.c20 * @memclk: Pointer to the peripheral clock
24 struct clk *memclk; member
32 clk_disable(pl353_smc->memclk); in pl353_smc_suspend()
49 ret = clk_enable(pl353_smc->memclk); in pl353_smc_resume()
87 pl353_smc->memclk = devm_clk_get_enabled(&adev->dev, "memclk"); in pl353_smc_probe()
88 if (IS_ERR(pl353_smc->memclk)) in pl353_smc_probe()
89 return dev_err_probe(&adev->dev, PTR_ERR(pl353_smc->memclk), in pl353_smc_probe()
90 "memclk clock not found.\n"); in pl353_smc_probe()
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Darm,pl35x-smc.yaml134 - const: memclk
142 clock-names = "memclk", "apb_pclk";
/linux/Documentation/devicetree/bindings/mtd/
H A Darm,pl353-nand-r2p1.yaml38 clock-names = "memclk", "apb_pclk";
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu15_driver_if_v15_0_0.h112 uint32_t MemClk; member
216 uint16_t MemclkFrequency; //Time filtered target MEMCLK frequency [MHz]
H A Dsmu13_driver_if_v13_0_5.h79 uint32_t MemClk; member
H A Dsmu13_driver_if_yellow_carp.h113 uint32_t MemClk; member
H A Dsmu11_driver_if_vangogh.h115 uint32_t memclk; member
H A Dsmu13_driver_if_v13_0_4.h114 uint32_t MemClk; member
/linux/tools/perf/pmu-events/arch/x86/amdzen6/
H A Dmemory-controller.json4 "PublicDescription": "Memory clock (MEMCLK) cycles.",
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.h41 uint32_t MemClk; member
H A Ddcn314_clk_mgr.c687 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[min_pstate].MemClk; in dcn314_clk_mgr_helper_populate_bw_params()
703 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[max_pstate].MemClk; in dcn314_clk_mgr_helper_populate_bw_params()
907 "smu_dpm_clks.dpm_clks->DfPstateTable[%d].MemClk= %d\n" in dcn314_clk_mgr_construct()
910 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].MemClk, in dcn314_clk_mgr_construct()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h63 uint32_t MemClk; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h69 uint32_t MemClk; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.h33 uint32_t memclk; member
/linux/arch/arm/include/uapi/asm/
H A Dsetup.h168 struct tag_memclk memclk; member
/linux/drivers/clk/samsung/
H A Dclk.h29 * @memclk_offset: memclk enable register offset in sysreg
362 * @memclk_offset: memclk enable register offset in sysreg
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c604 bw_params->clk_table.entries[entry_idx].memclk_mhz = clock_table->DfPstateTable[j].MemClk; in dcn31_clk_mgr_helper_populate_bw_params()
791 "smu_dpm_clks.dpm_clks->DfPstateTable[%d].MemClk= %d\n" in dcn31_clk_mgr_construct()
794 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].MemClk, in dcn31_clk_mgr_construct()
H A Ddcn31_smu.h122 uint32_t MemClk; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c1114 …w_params->clk_table.entries[entry_idx].memclk_mhz = clock_table->MemPstateTable[min_pstate].MemClk; in dcn35_clk_mgr_helper_populate_bw_params()
1134 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemPstateTable[max_pstate].MemClk; in dcn35_clk_mgr_helper_populate_bw_params()
1393 smu_dpm_clks_b->dpm_clks->MemPstateTable[i].MemClk = in translate_to_DpmClocks_t_dcn35()
1394 smu_dpm_clks_a->dpm_clks->MemPstateTable[i].MemClk; in translate_to_DpmClocks_t_dcn35()
1557 "smu_dpm_clks.dpm_clks->MemPstateTable[%d].MemClk= %d\n" in dcn35_clk_mgr_construct()
1560 i, smu_dpm_clks.dpm_clks->MemPstateTable[i].MemClk, in dcn35_clk_mgr_construct()
H A Ddcn35_smu.h95 uint32_t MemClk; member
/linux/arch/arm/mach-footbridge/
H A Dcommon.c130 mem_fclk_21285 = tag->u.memclk.fmemclk; in parse_tag_memclk()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c625 "[SetupDefaultDpmTable] failed to get memclk dpm levels!", in vega20_setup_memclk_dpm_table()
672 /* memclk */ in vega20_setup_default_dpm_tables()
1556 "[SetMclkOD] failed to set od memclk!", in vega20_set_mclk_od()
1559 /* retrieve updated memclk table */ in vega20_set_mclk_od()
1562 "[SetMclkOD] failed to refresh memclk table!", in vega20_set_mclk_od()
1845 "Failed to set soft min memclk !", in vega20_upload_dpm_min_level()
1948 "Failed to set soft max memclk!", in vega20_upload_dpm_max_level()
2097 "[MemMclks]: memclk dpm not enabled!\n", in vega20_dpm_get_mclk()
3148 /* retrieve updated memclk table */ in vega20_odn_edit_dpm_table()
3815 /* memclk */ in vega20_apply_clocks_adjust_rules()
[all …]
H A Dvega12_hwmgr.c679 /* memclk */ in vega12_setup_default_dpm_tables()
684 "[SetupDefaultDpmTable] failed to get memclk dpm levels!", in vega12_setup_default_dpm_tables()
1181 "Failed to set soft min memclk !", in vega12_upload_dpm_min_level()
1189 "Failed to set hard min memclk !", in vega12_upload_dpm_min_level()
1274 "Failed to set soft max memclk!", in vega12_upload_dpm_max_level()
2398 /* memclk */ in vega12_apply_clocks_adjust_rules()
/linux/arch/arm/kernel/
H A Datags_compat.c165 tag->u.memclk.fmemclk = params->u1.s.mem_fclk_21285; in build_tag_list()
/linux/sound/soc/codecs/aw88395/
H A Daw88395_device.c963 dev_err(aw_dev->dev, "memclk select pll failed"); in aw_dev_select_memclk()
970 dev_err(aw_dev->dev, "memclk select OSC failed"); in aw_dev_select_memclk()
973 dev_err(aw_dev->dev, "unknown memclk config, flag=0x%x", flag); in aw_dev_select_memclk()

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