| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | fsl,fman-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/fsl,fman-mdio.yaml#
7 title: Freescale Frame Manager MDIO Device
12 description: FMan MDIO Node.
13 The MDIO is a bus to which the PHY devices are connected.
18 - fsl,fman-mdio
20 - fsl,fman-memac-mdio
22 Must include "fsl,fman-mdio" for 1 Gb/s MDIO from FMan v2.
23 Must include "fsl,fman-xmdio" for 10 Gb/s MDIO from FMan v2.
24 Must include "fsl,fman-memac-mdio" for 1/10 Gb/s MDIO from
38 fsl,fman-internal-mdio:
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| H A D | brcm,unimac-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/brcm,unimac-mdio.yaml#
7 title: Broadcom UniMAC MDIO bus controller
15 - $ref: mdio.yaml#
20 - brcm,genet-mdio-v1
21 - brcm,genet-mdio-v2
22 - brcm,genet-mdio-v3
23 - brcm,genet-mdio-v4
24 - brcm,genet-mdio-v5
25 - brcm,asp-v2.0-mdio
26 - brcm,asp-v2.1-mdio
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| H A D | brcm,unimac-mdio.txt | 1 * Broadcom UniMAC MDIO bus controller
4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
5 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or
6 "brcm,unimac-mdio"
9 larger than 16-bits MDIO transactions
10 - reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
16 Ethernet switch this MDIO block is integrated from, or must be two, if there
17 are two separate interrupts, first one must be "mdio done" and second must be
18 for "mdio error"
22 - clocks: A reference to the clock supplying the MDIO bus controller
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| H A D | allwinner,sun8i-a83t-emac.yaml | 127 mdio-mux:
133 const: allwinner,sun8i-h3-mdio-mux
135 mdio-parent-bus:
138 Phandle to EMAC MDIO.
146 mdio@1:
147 $ref: mdio.yaml#
149 description: Internal MDIO Bus
153 const: allwinner,sun8i-h3-mdio-internal
178 mdio@2:
179 $ref: mdio
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| H A D | mdio-mux-multiplexer.txt | 1 Properties for an MDIO bus multiplexer consumer device
3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
7 Required properties in addition to the MDIO Bus multiplexer properties:
11 - mdio-parent-bus : phandle to the parent MDIO bus.
13 each child node of mdio bus multiplexer consumer device represent a mdio
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
38 mdio-mux-1 { // Mux consumer
39 compatible = "mdio-mux-multiplexer";
41 mdio-parent-bus = <&emdio1>;
45 mdio@0 {
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| H A D | qcom,ipq4019-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
7 title: Qualcomm IPQ40xx MDIO Controller
16 - qcom,ipq4019-mdio
17 - qcom,ipq5018-mdio
21 - qcom,ipq6018-mdio
22 - qcom,ipq8074-mdio
23 - qcom,ipq9574-mdio
24 - const: qcom,ipq4019-mdio
36 the first Address and length of the register set for the MDIO controller.
42 - description: MDIO clock source frequency fixed to 100MHZ
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| H A D | fsl,cpm-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/fsl,cpm-mdio.yaml#
7 title: Freescale CPM MDIO Device
16 - fsl,pq1-fec-mdio
17 - fsl,cpm2-mdio-bitbang
19 - const: fsl,mpc8272ads-mdio-bitbang
20 - const: fsl,mpc8272-mdio-bitbang
21 - const: fsl,cpm2-mdio-bitbang
26 fsl,mdio-pin:
28 description: pin of port C controlling mdio data
32 description: pin of port C controlling mdio clock
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| H A D | cavium-mdio.txt | 1 * System Management Interface (SMI) / MDIO
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
33 * System Management Interface (SMI) / MDIO Nexus
35 Several mdio buses may be gathered as children of a single PCI
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| H A D | mdio-mux-multiplexer.yaml | 4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml#
7 title: Properties for an MDIO bus multiplexer consumer device
13 This is a special case of MDIO mux when MDIO mux is defined as a consumer
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: mdio-mux-multiplexer
43 mdio-mux-1 { // Mux consumer
44 compatible = "mdio-mux-multiplexer";
46 mdio-parent-bus = <&emdio1>;
50 mdio@0 {
56 mdio@8 {
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| H A D | marvell-orion-mdio.txt | 1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
12 - reg: address and length of the MDIO registers. When an interrupt is
19 - clocks: phandle for up to four required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
27 mdio {
30 compatible = "marvell,orion-mdio";
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| H A D | brcm,mdio-mux-iproc.txt | 1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
3 This MDIO bus multiplexer defines buses that could be internal as well as
4 external to SoCs and could accept MDIO transaction compatible to C-22 or
6 properties as well to generate desired MDIO transaction on appropriate bus.
10 MDIO multiplexer node:
11 - compatible: brcm,mdio-mux-iproc.
17 - clocks: phandle of the core clock which drives the mdio block.
20 at- Documentation/devicetree/bindings/net/mdio-mux.yaml
24 mdio_mux_iproc: mdio-mux@66020000 {
25 compatible = "brcm,mdio-mux-iproc";
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| H A D | mdio-mux-mmioreg.yaml | 4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
19 - $ref: /schemas/net/mdio-mux.yaml#
24 - const: mdio-mux-mmioreg
25 - const: mdio-mux
37 child mdio-mux node must be constrained by this mask.
48 mdio-mux@9 {
49 compatible = "mdio-mux-mmioreg", "mdio-mux";
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| H A D | hisilicon-hns-mdio.txt | 1 Hisilicon MDIO bus controller
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
17 mdio@803c0000 {
20 compatible = "hisilicon,hns-mdio","hisilicon,mdio";
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| H A D | mdio-mux-mmioreg.txt | 1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
10 - compatible : string, must contain "mdio-mux-mmioreg"
18 'reg' property of each child mdio-mux node must be constrained by
24 For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
36 mdio-mux-emi2 {
37 compatible = "mdio-mux-mmioreg", "mdio-mux";
38 mdio-parent-bus = <&xmdio0>;
44 emi2_slot1: mdio@0 { // Slot 1 XAUI (FM2)
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| H A D | amlogic,gxl-mdio-mux.yaml | 4 $id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
7 title: Amlogic GXL MDIO bus multiplexer
13 This is a special case of a MDIO bus multiplexer. It allows to choose between
14 the internal mdio bus leading to the embedded 10/100 PHY or the external
15 MDIO bus on the Amlogic GXL SoC family.
18 - $ref: mdio-mux.yaml#
22 const: amlogic,gxl-mdio-mux
44 eth_phy_mux: mdio@558 {
45 compatible = "amlogic,gxl-mdio-mux";
51 mdio-parent-bus = <&mdio0>;
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| H A D | fsl-enetc.txt | 14 1. The ENETC external port is connected to a MDIO configurable phy
16 1.1. Using the local ENETC Port MDIO interface
18 In this case, the ENETC node should include a "mdio" sub-node
26 - phy-handle : Phandle to a PHY on the MDIO bus.
31 - mdio : "mdio" node, defined in mdio.txt.
43 mdio {
52 1.2. Using the central MDIO PCIe endpoint device
54 In this case, the mdio node should be defined as another PCIe
62 - compatible : Should be "fsl,enetc-mdio".
64 The remaining required mdio bus properties are standard, their bindings
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| H A D | brcm,mdio-mux-iproc.yaml | 4 $id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml#
7 title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
13 This MDIO bus multiplexer defines buses that could be internal as well as
14 external to SoCs and could accept MDIO transaction compatible to C-22 or
16 properties as well to generate desired MDIO transaction on appropriate bus.
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: brcm,mdio-mux-iproc
30 description: core clock driving the MDIO block
41 mdio_mux_iproc: mdio-mux@66020000 {
42 compatible = "brcm,mdio-mux-iproc";
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| H A D | brcm,bcmgenet.txt | 29 when operating in a RGMII to RGMII type of connection, or when the MDIO bus is
36 - mdio bus node: this node should always be present regardless of the PHY
39 MDIO bus node required properties:
41 - compatible: should contain one of "brcm,genet-mdio-v1", "brcm,genet-mdio-v2"
42 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5", the version
44 with brcm,genet-mdio-v4)
46 - #address-cells: address cell for MDIO bus addressing, should be 1
47 - #size-cells: size of the cells for MDIO bus addressing, should be 0
66 mdio@e14 {
67 compatible = "brcm,genet-mdio-v4";
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| H A D | amlogic,g12a-mdio-mux.yaml | 4 $id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
7 title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
10 This is a special case of a MDIO bus multiplexer. It allows to choose between
11 the internal mdio bus leading to the embedded 10/100 PHY or the external
12 MDIO bus.
18 - $ref: mdio-mux.yaml#
22 const: amlogic,g12a-mdio-mux
51 mdio-multiplexer@4c000 {
52 compatible = "amlogic,g12a-mdio-mux";
56 mdio-parent-bus = <&mdio0>;
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| /freebsd/sbin/mdconfig/ |
| H A D | mdconfig.c | 57 static struct md_ioctl mdio; variable
106 bzero(&mdio, sizeof(mdio)); in main()
107 mdio.md_file = malloc(PATH_MAX); in main()
108 mdio.md_label = malloc(PATH_MAX); in main()
109 if (mdio.md_file == NULL || mdio.md_label == NULL) in main()
112 bzero(mdio.md_file, PATH_MAX); in main()
113 bzero(mdio.md_label, PATH_MAX); in main()
131 mdio.md_options |= MD_AUTOUNIT; in main()
138 mdio.md_options |= MD_AUTOUNIT; in main()
145 mdio.md_options |= MD_AUTOUNIT; in main()
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| /freebsd/sys/dev/mdio/ |
| H A D | mdio_if.m | 4 INTERFACE mdio;
7 #include <dev/mdio/mdio.h>
29 * @brief Read register from device on MDIO bus.
31 * @param dev MDIO bus device.
42 * @brief Read register from device on MDIO muxed bus.
44 * @param dev MDIO bus device.
45 * @param bus MDIO bus mux position
57 * @brief Write register to device on MDIO bus.
59 * @param dev MDIO bus device.
72 * @brief Write register to device on MDIO muxed bus.
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| /freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | realtek.yaml | 18 MDIO or SPI.
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
22 not use the MDIO protocol. This binding defines how to specify the
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
28 an MDIO node.
54 mdio-gpios:
55 description: GPIO line for the MDIO data line.
103 mdio:
104 $ref: /schemas/net/mdio.yaml#
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| H A D | realtek-smi.txt | 5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
6 not use the MDIO protocol. This binding defines how to specify the
24 - mdio-gpios: GPIO line for the MDIO data line.
49 - mdio
51 This defines the internal MDIO bus of the SMI device, mostly for the
55 Required properties of mdio:
57 - compatible: should be set to "realtek,smi-mdio" for all SMI devices
59 See net/mdio.txt for additional MDIO bus properties.
70 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
72 mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-lx2160a-qds.dts | 35 mdio-mux-1 {
36 compatible = "mdio-mux-multiplexer";
38 mdio-parent-bus = <&emdio1>;
42 mdio@0 { /* On-board PHY #1 RGMI1*/
48 mdio@8 { /* On-board PHY #2 RGMI2*/
54 mdio@18 { /* Slot #1 */
60 mdio@19 { /* Slot #2 */
66 mdio@1a { /* Slot #3 */
72 mdio@1b { /* Slot #4 */
78 mdio@1c { /* Slot #5 */
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| H A D | fsl-lx2162a-qds.dts | 33 mdio-mux-1 {
34 compatible = "mdio-mux-multiplexer";
36 mdio-parent-bus = <&emdio1>;
40 mdio@0 { /* On-board RTL8211F PHY #1 RGMII1 */
52 mdio@8 { /* On-board RTL8211F PHY #2 RGMII2 */
64 mdio@18 { /* Slot #1 */
70 mdio@19 { /* Slot #2 */
76 mdio@1a { /* Slot #3 */
82 mdio@1b { /* Slot #4 */
88 mdio@1c { /* Slot #5 */
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