| /linux/drivers/net/mdio/ | 
| H A D | mdio-regmap.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later2 /* Driver for MMIO-Mapped MDIO devices. Some IPs expose internal PHYs or PCS
 3  * within the MMIO-mapped area
 9 #include <linux/mdio.h>
 16 #include <linux/mdio/mdio-regmap.h>
 18 #define DRV_NAME "mdio-regmap"
 25 static int mdio_regmap_read_c22(struct mii_bus *bus, int addr, int regnum)  in mdio_regmap_read_c22()  argument
 27 	struct mdio_regmap_priv *ctx = bus->priv;  in mdio_regmap_read_c22()
 31 	if (ctx->valid_addr != addr)  in mdio_regmap_read_c22()
 32 		return -ENODEV;  in mdio_regmap_read_c22()
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| H A D | mdio-mux.c | 1 // SPDX-License-Identifier: GPL-2.07 #include <linux/mdio-mux.h>
 13 #define DRV_DESCRIPTION "MDIO bus multiplexer driver"
 30 	struct mdio_mux_parent_bus *parent;  member
 36  * The parent bus' lock is used to order access to the switch_fn.
 38 static int mdio_mux_read(struct mii_bus *bus, int phy_id, int regnum)  in mdio_mux_read()  argument
 40 	struct mdio_mux_child_bus *cb = bus->priv;  in mdio_mux_read()
 41 	struct mdio_mux_parent_bus *pb = cb->parent;  in mdio_mux_read()
 44 	mutex_lock_nested(&pb->mii_bus->mdio_lock, MDIO_MUTEX_MUX);  in mdio_mux_read()
 45 	r = pb->switch_fn(pb->current_child, cb->bus_number, pb->switch_data);  in mdio_mux_read()
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| H A D | mdio-i2c.c | 1 // SPDX-License-Identifier: GPL-2.03  * MDIO I2C bridge
 5  * Copyright (C) 2015-2016 Russell King
 14 #include <linux/mdio/mdio-i2c.h>
 19  * I2C bus addresses 0x50 and 0x51 are normally an EEPROM, which is
 33 static int i2c_mii_read_default_c45(struct mii_bus *bus, int phy_id, int devad,  in i2c_mii_read_default_c45()  argument
 36 	struct i2c_adapter *i2c = bus->priv;  in i2c_mii_read_default_c45()
 54 	msgs[0].len = p - addr;  in i2c_mii_read_default_c45()
 68 static int i2c_mii_write_default_c45(struct mii_bus *bus, int phy_id,  in i2c_mii_write_default_c45()  argument
 71 	struct i2c_adapter *i2c = bus->priv;  in i2c_mii_write_default_c45()
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| /linux/drivers/net/dsa/mv88e6xxx/ | 
| H A D | pcs-6352.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later25 	struct mdio_device mdio;  member
 43 	mutex_lock(&mpcs->mdio.bus->mdio_lock);  in marvell_c22_pcs_set_fiber_page()
 45 	err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE);  in marvell_c22_pcs_set_fiber_page()
 47 		dev_err(mpcs->mdio.dev.parent,  in marvell_c22_pcs_set_fiber_page()
 49 			mpcs->name, ERR_PTR(err));  in marvell_c22_pcs_set_fiber_page()
 55 	err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,  in marvell_c22_pcs_set_fiber_page()
 58 		dev_err(mpcs->mdio.dev.parent,  in marvell_c22_pcs_set_fiber_page()
 60 			mpcs->name, ERR_PTR(err));  in marvell_c22_pcs_set_fiber_page()
 73 		err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,  in marvell_c22_pcs_restore_page()
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| H A D | pcs-639x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later21 	struct mdio_device mdio;  member
 36 	err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum);  in mv88e639x_read()
 47 	return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val);  in mv88e639x_write()
 53 	return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask,  in mv88e639x_modify()
 60 	return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum,  in mv88e639x_modify_changed()
 65 mv88e639x_pcs_alloc(struct device *dev, struct mii_bus *bus, unsigned int addr,  in mv88e639x_pcs_alloc()  argument
 74 	mpcs->mdio.dev.parent = dev;  in mv88e639x_pcs_alloc()
 75 	mpcs->mdio.bus = bus;  in mv88e639x_pcs_alloc()
 76 	mpcs->mdio.addr = addr;  in mv88e639x_pcs_alloc()
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| /linux/drivers/net/ethernet/hisilicon/ | 
| H A D | hns_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later3  * Copyright (c) 2014-2015 Hisilicon Limited.
 23 #define MDIO_DRV_NAME "Hi-HNS_MDIO"
 24 #define MDIO_BUS_NAME "Hisilicon MII Bus"
 38 	u8 __iomem *vbase;		/* mdio reg base address */
 43 /* mdio reg */
 101 	mdio_write_reg((a)->vbase, (reg), (value))
 126 	mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))
 137 		mdio_get_reg_field((dev)->vbase, (reg), (mask), (shift))
 140 		mdio_get_reg_field((dev)->vbase, (reg), 0x1ull, (bit))
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| /linux/Documentation/devicetree/bindings/net/ | 
| H A D | mdio-mux-multiplexer.yaml | 1 # SPDX-License-Identifier: GPL-2.03 ---
 4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Properties for an MDIO bus multiplexer consumer device
 10   - Andrew Lunn <andrew@lunn.ch>
 13   This is a special case of MDIO mux when MDIO mux is defined as a consumer
 19   - $ref: /schemas/net/mdio-mux.yaml#
 23     const: mdio-mux-multiplexer
 25   mux-controls:
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| H A D | mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.03 ---
 4 $id: http://devicetree.org/schemas/net/mdio-mux.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Common MDIO bus multiplexer/switch properties.
 10   - Andrew Lunn <andrew@lunn.ch>
 13   An MDIO bus multiplexer/switch will have several child busses that are
 14   numbered uniquely in a device dependent manner.  The nodes for an MDIO
 15   bus multiplexer/switch will have one child node for each child bus.
 18   mdio-parent-bus:
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| H A D | amlogic,gxl-mdio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---
 4 $id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Amlogic GXL MDIO bus multiplexer
 10   - Jerome Brunet <jbrunet@baylibre.com>
 13   This is a special case of a MDIO bus multiplexer. It allows to choose between
 14   the internal mdio bus leading to the embedded 10/100 PHY or the external
 15   MDIO bus on the Amlogic GXL SoC family.
 18   - $ref: mdio-mux.yaml#
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| H A D | mdio-mux-mmioreg.yaml | 1 # SPDX-License-Identifier: GPL-2.03 ---
 4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
 10   - Andrew Lunn <andrew@lunn.ch>
 13   This is a special case of a MDIO bus multiplexer.  A memory-mapped device,
 14   like an FPGA, is used to control which child bus is connected.  The mdio-mux
 15   node must be a child of the memory-mapped device.  The driver currently only
 16   supports devices with 8, 16 or 32-bit registers.
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| H A D | amlogic,g12a-mdio-mux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
 10   This is a special case of a MDIO bus multiplexer. It allows to choose between
 11   the internal mdio bus leading to the embedded 10/100 PHY or the external
 12   MDIO bus.
 15   - Neil Armstrong <neil.armstrong@linaro.org>
 18   - $ref: mdio-mux.yaml#
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| /linux/arch/mips/boot/dts/realtek/ | 
| H A D | rtl930x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause4 	compatible = "realtek,rtl9302-soc";
 6 	#address-cells = <1>;
 7 	#size-cells = <1>;
 15 		compatible = "mti,cpu-interrupt-controller";
 16 		#address-cells = <0>;
 17 		#interrupt-cells = <1>;
 18 		interrupt-controller;
 22 		#address-cells = <1>;
 23 		#size-cells = <0>;
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| /linux/drivers/net/ethernet/marvell/ | 
| H A D | mvmdio.c | 2  * Driver for the MDIO interface of Marvell network interfaces.4  * Since the MDIO interface of Marvell network interfaces is shared
 8  * the MDIO bus). This driver is currently used by the mvneta and
 13  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 65  * - Kirkwood 88F6281 (Globalscale Dreamplug): 45us to 95us (Interrupt)
 66  * - Armada 370       (Globalscale Mirabox):   41us to 43us (Polled)
 95 				 struct mii_bus *bus)  in orion_mdio_wait_ready()  argument
 97 	struct orion_mdio_dev *dev = bus->priv;  in orion_mdio_wait_ready()
 101 	if (dev->err_interrupt <= 0) {  in orion_mdio_wait_ready()
 102 		if (!read_poll_timeout_atomic(ops->is_done, done, done, 2,  in orion_mdio_wait_ready()
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| /linux/Documentation/devicetree/bindings/mux/ | 
| H A D | reg-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.03 ---
 4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Generic register bitfield-based multiplexer controller
 10   - Peter Rosin <peda@axentia.se>
 13   Define register bitfields to be used to control multiplexers. The parent
 19       - reg-mux   # parent device of mux controller is not syscon device
 20       - mmio-mux  # parent device of mux controller is syscon device
 24   '#mux-control-cells':
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| /linux/arch/arm/boot/dts/nxp/vf/ | 
| H A D | vf610-zii-dev-rev-c.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)6 /dts-v1/;
 7 #include "vf610-zii-dev.dtsi"
 11 	compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
 13 	mdio-mux {
 14 		compatible = "mdio-mux-gpio";
 15 		pinctrl-0 = <&pinctrl_mdio_mux>;
 16 		pinctrl-names = "default";
 20 		mdio-parent-bus = <&mdio1>;
 21 		#address-cells = <1>;
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| /linux/arch/powerpc/boot/dts/ | 
| H A D | kmeter1.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later5  * 2008-2011 DENX Software Engineering GmbH
 8 /dts-v1/;
 13 	#address-cells = <1>;
 14 	#size-cells = <1>;
 28 		#address-cells = <1>;
 29 		#size-cells = <0>;
 34 			d-cache-line-size = <32>;	// 32 bytes
 35 			i-cache-line-size = <32>;	// 32 bytes
 36 			d-cache-size = <32768>;		// L1, 32K
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| H A D | mpc8308rdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later9 /dts-v1/;
 13 	#address-cells = <1>;
 14 	#size-cells = <1>;
 25 		#address-cells = <1>;
 26 		#size-cells = <0>;
 31 			d-cache-line-size = <32>;
 32 			i-cache-line-size = <32>;
 33 			d-cache-size = <16384>;
 34 			i-cache-size = <16384>;
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| H A D | ksi8560.dts | 15 /dts-v1/;22 	#address-cells = <1>;
 23 	#size-cells = <1>;
 32 		#address-cells = <1>;
 33 		#size-cells = <0>;
 38 			d-cache-line-size = <32>;
 39 			i-cache-line-size = <32>;
 40 			d-cache-size = <0x8000>;		/* L1, 32K */
 41 			i-cache-size = <0x8000>;		/* L1, 32K */
 42 			timebase-frequency = <0>;		/* From U-boot */
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| H A D | holly.dts | 13 /dts-v1/;18 	#address-cells = <1>;
 19 	#size-cells = <1>;
 22 		#address-cells = <1>;
 23 		#size-cells =<0>;
 27 			d-cache-line-size = <32>;
 28 			i-cache-line-size = <32>;
 29 			d-cache-size = <32768>;
 30 			i-cache-size = <32768>;
 31 			d-cache-sets = <128>;
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| H A D | adder875-uboot.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later3  * Device Tree Source for MPC885 ADS running U-Boot
 9 /dts-v1/;
 12 	compatible = "analogue-and-micro,adder875";
 13 	#address-cells = <1>;
 14 	#size-cells = <1>;
 23 		#address-cells = <1>;
 24 		#size-cells = <0>;
 29 			d-cache-line-size = <16>;
 30 			i-cache-line-size = <16>;
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| /linux/drivers/net/ethernet/freescale/ | 
| H A D | xgmac_mdio.c | 2  * QorIQ 10G MDIO Controller20 #include <linux/mdio.h>
 33 	__be32	mdio_stat;	/* MDIO configuration and status */
 34 	__be32	mdio_ctl;	/* MDIO control */
 35 	__be32	mdio_data;	/* MDIO data */
 36 	__be32	mdio_addr;	/* MDIO address */
 82  * Wait until the MDIO bus is free
 90 	/* Wait till the bus is free */  in xgmac_wait_until_free()
 92 	while ((xgmac_read32(®s->mdio_stat, is_little_endian) &  in xgmac_wait_until_free()
 95 		timeout--;  in xgmac_wait_until_free()
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| /linux/drivers/net/ethernet/arc/ | 
| H A D | emac_mdio.c | 1 // SPDX-License-Identifier: GPL-2.03  * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
 5  * MDIO implementation for ARC EMAC
 15 /* Number of seconds we wait for "MDIO complete" flag to appear */
 19  * arc_mdio_complete_wait - Waits until MDIO transaction is completed.
 22  * returns:	0 on success, -ETIMEDOUT on a timeout.
 34 			/* Reset "MDIO complete" flag */  in arc_mdio_complete_wait()
 42 	return -ETIMEDOUT;  in arc_mdio_complete_wait()
 46  * arc_mdio_read - MDIO interface read function.
 47  * @bus:	Pointer to MII bus structure.
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| /linux/arch/arm64/boot/dts/freescale/ | 
| H A D | fsl-lx2162a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;
 9 #include "fsl-lx2160a.dtsi"
 13 	compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
 23 		stdout-path = "serial0:115200n8";
 26 	sb_3v3: regulator-sb3v3 {
 27 		compatible = "regulator-fixed";
 28 		regulator-name = "LTM4619-3.3VSB";
 29 		regulator-min-microvolt = <3300000>;
 30 		regulator-max-microvolt = <3300000>;
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| H A D | fsl-lx2160a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;
 9 #include "fsl-lx2160a.dtsi"
 13 	compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
 23 		stdout-path = "serial0:115200n8";
 26 	sb_3v3: regulator-sb3v3 {
 27 		compatible = "regulator-fixed";
 28 		regulator-name = "MC34717-3.3VSB";
 29 		regulator-min-microvolt = <3300000>;
 30 		regulator-max-microvolt = <3300000>;
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| /linux/include/linux/ | 
| H A D | mdio-mux.h | 2  * MDIO bus multiplexer framwork.15 /* mdio_mux_init() - Initialize a MDIO mux
 16  * @dev		The device owning the MDIO mux
 17  * @mux_node	The device node of the MDIO mux
 18  * @switch_fn	The function called for switching target MDIO child
 19  * mux_handle	A pointer to a (void *) used internaly by mdio-mux
 21  * @mux_bus	An optional parent bus (Other case are to use parent_bus property)
 
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