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/linux/drivers/gpu/drm/mcde/
H A Dmcde_display.c4 * Parts of this file were based on the MCDE driver by Marcus Lorentzon
74 void mcde_display_irq(struct mcde *mcde) in mcde_display_irq() argument
80 mispp = readl(mcde->regs + MCDE_MISPP); in mcde_display_irq()
81 misovl = readl(mcde->regs + MCDE_MISOVL); in mcde_display_irq()
82 mischnl = readl(mcde->regs + MCDE_MISCHNL); in mcde_display_irq()
86 * are just latched onto the MCDE IRQ line, so we need to traverse in mcde_display_irq()
92 if (!mcde->dpi_output && mcde_dsi_irq(mcde->mdsi)) { in mcde_display_irq()
101 if (mcde->flow_mode == MCDE_COMMAND_ONESHOT_FLOW) { in mcde_display_irq()
102 spin_lock(&mcde->flow_lock); in mcde_display_irq()
103 if (--mcde->flow_active == 0) { in mcde_display_irq()
[all …]
H A Dmcde_drv.c4 * Parts of this file were based on the MCDE driver by Marcus Lorentzon
9 * DOC: ST-Ericsson MCDE Driver
11 * The MCDE (short for multi-channel display engine) is a graphics
84 #define DRIVER_DESC "DRM module for MCDE"
113 struct mcde *mcde = data; in mcde_irq() local
116 val = readl(mcde->regs + MCDE_MISERR); in mcde_irq()
118 mcde_display_irq(mcde); in mcde_irq()
121 dev_info(mcde->dev, "some error IRQ\n"); in mcde_irq()
122 writel(val, mcde->regs + MCDE_RISERR); in mcde_irq()
130 struct mcde *mcde = to_mcde(drm); in mcde_modeset_init() local
[all …]
H A Dmcde_clk_div.c9 /* The MCDE internal clock dividers for FIFO A and B */
12 struct mcde *mcde; member
20 struct mcde *mcde = cdiv->mcde; in mcde_clk_div_enable() local
23 spin_lock(&mcde->fifo_crx1_lock); in mcde_clk_div_enable()
24 val = readl(mcde->regs + cdiv->cr); in mcde_clk_div_enable()
38 writel(val, mcde->regs + cdiv->cr); in mcde_clk_div_enable()
39 spin_unlock(&mcde->fifo_crx1_lock); in mcde_clk_div_enable()
86 struct mcde *mcde = cdiv->mcde; in mcde_clk_div_recalc_rate() local
91 * If the MCDE is not powered we can't access registers. in mcde_clk_div_recalc_rate()
95 if (!regulator_is_enabled(mcde->epod)) in mcde_clk_div_recalc_rate()
[all …]
H A Dmcde_drm.h4 * Parts of this file were based on the MCDE driver by Marcus Lorentzon
69 struct mcde { struct
91 /* Locks the MCDE FIFO control register A and B */
98 #define to_mcde(dev) container_of(dev, struct mcde, drm) argument
100 static inline bool mcde_flow_is_video(struct mcde *mcde) in mcde_flow_is_video() argument
102 return (mcde->flow_mode == MCDE_VIDEO_TE_FLOW || in mcde_flow_is_video()
103 mcde->flow_mode == MCDE_VIDEO_FORMATTER_FLOW); in mcde_flow_is_video()
112 void mcde_display_irq(struct mcde *mcde);
113 void mcde_display_disable_irqs(struct mcde *mcde);
116 int mcde_init_clock_divider(struct mcde *mcde);
H A Dmcde_dsi.c40 struct mcde *mcde; member
150 d->mcde->mdsi = d->mdsi; in mcde_dsi_attach_to_mcde()
165 d->mcde->flow_mode = MCDE_VIDEO_FORMATTER_FLOW; in mcde_dsi_attach_to_mcde()
167 d->mcde->flow_mode = MCDE_COMMAND_TE_FLOW; in mcde_dsi_attach_to_mcde()
187 if (d->mcde) in mcde_dsi_host_attach()
199 if (d->mcde) in mcde_dsi_host_detach()
200 d->mcde->mdsi = NULL; in mcde_dsi_host_detach()
758 /* Enable the DSI port, from drivers/video/mcde/dsilink_v2.c */ in mcde_dsi_start()
955 dev_info(d->dev, "enabled MCDE DSI master\n"); in mcde_dsi_enable()
1074 struct mcde *mcde = to_mcde(drm); in mcde_dsi_bind() local
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H A DKconfig2 tristate "DRM Support for ST-Ericsson MCDE (Multichannel Display Engine)"
15 Choose this option for DRM support for the ST-Ericsson MCDE
/linux/Documentation/devicetree/bindings/display/
H A Dste,mcde.yaml4 $id: http://devicetree.org/schemas/display/ste,mcde.yaml#
7 title: ST-Ericsson Multi Channel Display Engine MCDE
14 const: ste,mcde
23 description: an array of the MCDE clocks
25 - description: MCDECLK (main MCDE clock)
31 - const: mcde
65 const: ste,mcde-dsi
115 mcde@a0350000 {
116 compatible = "ste,mcde";
124 clock-names = "mcde", "lcd", "hdmi";
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/linux/Documentation/gpu/
H A Dmcde.rst4 drm/mcde ST-Ericsson MCDE Multi-channel display engine
7 .. kernel-doc:: drivers/gpu/drm/mcde/mcde_drv.c
8 :doc: ST-Ericsson MCDE Driver
H A Ddrivers.rst11 mcde
/linux/Documentation/arch/sparc/
H A Dadi.rst16 1. Set the user mode PSTATE.mcde bit. This acts as master switch for
41 kernel sets the PSTATE.mcde bit for the task. Version tags for memory
101 the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
121 the task is running with ADI enabled (PSTATE.mcde=1), and the ADI
186 unsigned long i, mcde, adi_blksz, adi_nbits;
/linux/arch/sparc/kernel/
H A Detrap_64.S157 * the ADI security, we must enable PSTATE.mcde. Userspace
160 * dereferenced. Setting PSTATE.mcde would ensure any
163 * using system calls. Setting PSTATE.mcde only affects
H A Drtrap_64.S31 * the ADI security, we must re-enable PSTATE.mcde before
47 * the ADI security, we must re-enable PSTATE.mcde before
73 * the ADI security, we must re-enable PSTATE.mcde before
H A Durtt_fill.S56 /* Re-enable PSTATE.mcde to maintain ADI security */
/linux/Documentation/devicetree/bindings/display/panel/
H A Dsony,acx424akp.yaml46 compatible = "ste,mcde-dsi";
/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0.dtsi1182 mcde@a0350000 {
1183 compatible = "ste,mcde";
1187 clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
1190 clock-names = "mcde", "lcd", "hdmi";
1197 compatible = "ste,mcde-dsi";
1205 compatible = "ste,mcde-dsi";
1213 compatible = "ste,mcde-dsi";
H A Dste-href-stuib.dtsi198 mcde@a0350000 {
H A Dste-href-family-pinctrl.dtsi72 mcde {
H A Dste-href-tvk1281618-r3.dtsi155 mcde@a0350000 {
H A Dste-ux500-samsung-golden.dts361 mcde@a0350000 {
612 mcde {
H A Dste-href.dtsi253 mcde@a0350000 {
H A Dste-ux500-samsung-skomer.dts470 mcde@a0350000 {
515 mcde {
H A Dste-ab8505.dtsi310 mcde@a0350000 {
/linux/arch/sparc/include/uapi/asm/
H A Dpstate.h14 /* IG on V9 conflicts with MCDE on M7. PSTATE_MCDE will only be used on
56 /* IG on V9 conflicts with MCDE on M7. TSTATE_MCDE will only be used on
/linux/Documentation/devicetree/bindings/dma/
H A Dstericsson,dma40.yaml32 10: Multi-Channel Display Engine MCDE RX
/linux/drivers/gpu/drm/
H A DMakefile213 obj-$(CONFIG_DRM_MCDE) += mcde/

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