| /linux/arch/arm64/boot/dts/broadcom/stingray/ |
| H A D | stingray-fs4.dtsi | 57 mboxes = <&raid_mbox 0 0x1 0xff00>,
65 mboxes = <&raid_mbox 4 0x1 0xff00>,
73 mboxes = <&raid_mbox 8 0x1 0xff00>,
81 mboxes = <&raid_mbox 12 0x1 0xff00>,
89 mboxes = <&raid_mbox 16 0x1 0xff00>,
97 mboxes = <&raid_mbox 20 0x1 0xff00>,
105 mboxes = <&raid_mbox 24 0x1 0xff00>,
113 mboxes = <&raid_mbox 28 0x1 0xff00>,
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| /linux/Documentation/devicetree/bindings/power/reset/ |
| H A D | xlnx,zynqmp-power.yaml | 23 mboxes:
26 the mboxes property should contain a phandle to the
42 Name given to channels seen in the 'mboxes' property.
77 mboxes = <&ipi_mailbox_pmu1 0>,
|
| /linux/Documentation/devicetree/bindings/dsp/ |
| H A D | fsl,dsp.yaml | 57 mboxes:
91 - mboxes
127 mboxes:
138 mboxes:
165 mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
199 mboxes = <&mu2 0 0>,
|
| H A D | mediatek,mt8186-dsp.yaml | 49 mboxes:
72 - mboxes
92 mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
|
| H A D | mediatek,mt8195-dsp.yaml | 51 mboxes:
75 - mboxes
104 mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
|
| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | arm,mhuv2.yaml | 133 It is always set to 2. The first argument in the consumers 'mboxes'
142 mboxes = <&mhu 0 5>; // Channel Window Group 0, doorbell 5.
143 mboxes = <&mhu 1 7>; // Channel Window Group 1, doorbell 7.
144 mboxes = <&mhu 2 0>; // Channel Window Group 2, data transfer protocol with 1 window.
145 mboxes = <&mhu 3 0>; // Channel Window Group 3, data transfer protocol with 5 windows.
146 mboxes = <&mhu 4 0>; // Channel Window Group 4, data transfer protocol with 7 windows.
202 mboxes = <&mhu_tx 2 0>, //data-transfer protocol with 5 windows, mhu-tx
|
| H A D | mailbox.txt | 22 - mboxes: List of phandle and mailbox channel specifiers.
36 mboxes = <&mailbox 0 &mailbox 1>;
57 mboxes = <&mailbox 0>;
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| H A D | hisilicon,hi3660-mailbox.txt | 38 - mboxes : Standard property to specify a Mailbox (See ./mailbox.txt)
42 - mbox-names : Name given to channels seen in the 'mboxes' property.
50 mboxes = <&mailbox 13 3 0>;
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| H A D | altera-mailbox.txt | 34 "mboxes" and the optional "mbox-names" (please see
36 of the mboxes property should contain a phandle to the mailbox controller
46 mboxes = <&mbox_tx 0>,
|
| /linux/Documentation/devicetree/bindings/media/ |
| H A D | mediatek,mdp3-rdma.yaml | 75 mboxes:
111 mboxes:
115 - mboxes
129 mboxes:
165 mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST>,
|
| H A D | amphion,vpu.yaml | 76 mboxes:
97 - mboxes
151 mboxes = <&mu_m0 0 0>,
162 mboxes = <&mu1_m0 0 0>,
173 mboxes = <&mu2_m0 0 0>,
|
| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | dra7-ipu-dsp-common.dtsi | 24 mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
30 mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
36 mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
|
| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am68-sk-som.dtsi | 294 mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
300 mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
339 mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
345 mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
351 mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
357 mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
364 mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
371 mboxes = <&mailbox0_cluster4 &mbox_c71_1>;
|
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | qcom,mpm.yaml | 44 mboxes:
77 - mboxes
98 mboxes = <&apcs_glb 0>;
105 mboxes = <&apcs_glb 1>;
|
| /linux/Documentation/devicetree/bindings/arm/keystone/ |
| H A D | ti,sci.yaml | 61 mboxes:
85 - mboxes
94 mboxes = <&msgmgr 5 2>,
105 mboxes = <&secure_proxy_main 11>,
|
| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | nvidia,tegra194-tcu.yaml | 37 mboxes:
48 - mboxes
58 mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_SM 0>,
|
| /linux/Documentation/devicetree/bindings/soc/microchip/ |
| H A D | microchip,mpfs-sys-controller.yaml | 23 mboxes:
41 - mboxes
49 mboxes = <&mbox 0>;
|
| /linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | qcom,glink-edge.yaml | 46 mboxes:
58 - mboxes
91 mboxes = <&ipcc IPCC_CLIENT_WPSS
|
| H A D | ti,omap-remoteproc.yaml | 36 image. Examples of variable properties include 'mboxes', 'memory-region',
61 mboxes:
215 - mboxes
246 mboxes = <&mailbox &mbox_dsp>;
283 mboxes = <&mailbox &mbox_ipu>;
323 mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
|
| H A D | qcom,glink-rpm-edge.yaml | 28 mboxes:
72 - mboxes
89 mboxes = <&apcs_glb 0>;
|
| /linux/drivers/firmware/arm_scmi/transports/ |
| H A D | mailbox.c | 86 num_mb = of_count_phandle_with_args(of_node, "mboxes", "#mbox-cells"); in mailbox_chan_available()
90 return !of_parse_phandle_with_args(of_node, "mboxes", in mailbox_chan_available()
107 * 'mboxes' and 'shmem', then determin which mailbox channel indexes are
118 num_mb = of_count_phandle_with_args(np, "mboxes", "#mbox-cells"); in mailbox_chan_validate()
120 dev_dbg(cdev, "Found %d mboxes and %d shmems !\n", num_mb, num_sh); in mailbox_chan_validate()
122 /* Bail out if mboxes and shmem descriptors are inconsistent */ in mailbox_chan_validate()
146 /* Calculate channels IDs to use depending on mboxes/shmem layout */ in mailbox_chan_validate()
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8-ss-vpu.dtsi | 47 mboxes = <&mu_m0 0 0>,
58 mboxes = <&mu1_m0 0 0>,
69 mboxes = <&mu2_m0 0 0>,
|
| /linux/Documentation/devicetree/bindings/arm/bcm/ |
| H A D | raspberrypi,bcm2835-firmware.yaml | 28 mboxes:
108 - mboxes
116 mboxes = <&mailbox>;
|
| /linux/Documentation/devicetree/bindings/nvme/ |
| H A D | apple,nvme-ans.yaml | 51 mboxes:
92 - mboxes
108 mboxes = <&ans>;
|
| /linux/drivers/gpu/drm/gma500/ |
| H A D | opregion.c | 52 u32 mboxes; member
307 u32 opregion_phy, mboxes; in psb_intel_opregion_setup() local
335 mboxes = opregion->header->mboxes; in psb_intel_opregion_setup()
336 if (mboxes & MBOX_ACPI) { in psb_intel_opregion_setup()
341 if (mboxes & MBOX_ASLE) { in psb_intel_opregion_setup()
|