/linux/arch/arm/boot/dts/ti/omap/ |
H A D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; 41 interrupt-parent = <&wakeupgen>; [all …]
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H A D | dra72x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 20 compatible = "arm,cortex-a15-pmu"; 21 interrupt-parent = <&wakeupgen>; 27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */ 28 compatible = "ti,sysc-omap4", "ti,sysc"; 31 reg-names = "rev", "sysc"; 32 ti,sysc-midle = <SYSC_IDLE_FORCE>, 34 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 37 clock-names = "fck"; [all …]
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H A D | omap2420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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H A D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-ti.h> 12 #include "k3-serdes.h" 15 serdes_refclk: clock-serdes { 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 25 compatible = "mmio-sram"; [all …]
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H A D | k3-j784s4-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/net/ti-dp83867.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include "k3-j784s4.dtsi" 15 compatible = "ti,j784s4-evm", "ti,j784s4"; 19 stdout-path = "serial2:115200n8"; 36 bootph-all; 42 reserved_memory: reserved-memory { [all …]
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H A D | k3-j721e-beagleboneai64.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * https://beagleboard.org/ai-64 4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation 6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation 9 /dts-v1/; 11 #include "k3-j721e.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> [all …]
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H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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H A D | k3-am69-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 /dts-v1/; 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include "k3-j784s4.dtsi" 16 compatible = "ti,am69-sk", "ti,j784s4"; 20 stdout-path = "serial2:115200n8"; 36 bootph-all; 42 reserved_memory: reserved-memory { [all …]
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H A D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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H A D | k3-j721e-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM 8 /dts-v1/; 10 #include "k3-j721e.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/net/ti-dp83867.h> 16 compatible = "ti,j721e-sk", "ti,j721e"; 29 stdout-path = "serial2:115200n8"; [all …]
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H A D | k3-am642-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/net/ti-dp83867.h> 11 #include <dt-bindings/leds/common.h> 12 #include "k3-am642.dtsi" 14 #include "k3-serdes.h" 17 compatible = "ti,am642-sk", "ti,am642"; [all …]
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H A D | k3-am64-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com 6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH 10 * https://www.phytec.com/product/phycore-am64x 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/net/ti-dp83867.h> 18 model = "PHYTEC phyCORE-AM64x"; 19 compatible = "phytec,am64-phycore-som", "ti,am642"; 32 reserved_memory: reserved-memory { [all …]
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H A D | k3-j721s2-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-j721s2.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 16 bootph-all; 23 reserved_memory: reserved-memory { 24 #address-cells = <2>; 25 #size-cells = <2>; 31 no-map; [all …]
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H A D | k3-j722s-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 4 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 9 /dts-v1/; 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy.h> 13 #include "k3-j722s.dtsi" 14 #include "k3-serdes.h" 17 compatible = "ti,j722s-evm", "ti,j722s"; 29 stdout-path = &main_uart0; 37 bootph-pre-ram; [all …]
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/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | altera-mailbox.txt | 5 - compatible : "altr,mailbox-1.0". 6 - reg : physical base address of the mailbox and length of 8 - #mbox-cells: Common mailbox binding property to identify the number 12 - interrupts : interrupt number. The interrupt specifier format 17 compatible = "altr,mailbox-1.0"; 19 interrupt-parent = < &gic_0 >; 21 #mbox-cells = <1>; 25 compatible = "altr,mailbox-1.0"; 27 interrupt-parent = < &gic_0 >; 29 #mbox-cells = <1>; [all …]
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H A D | hisilicon,hi6220-mailbox.txt | 13 -------------------- 14 - compatible: Shall be "hisilicon,hi6220-mbox" 15 - reg: Contains the mailbox register address range (base 19 - #mbox-cells: Common mailbox binding property to identify the number 28 - interrupts: Contains the interrupt information for the mailbox 33 -------------------- 34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver 40 -------- 43 compatible = "hisilicon,hi6220-mbox"; 46 interrupt-parent = <&gic>; [all …]
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H A D | arm,mhu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jassi Brar <jaswinder.singh@linaro.org> 13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3 22 interrupt signal using a 32-bit register, with all 32-bits logically ORed 28 interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote 37 - arm,mhu 38 - arm,mhu-doorbell 40 - compatible [all …]
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H A D | sprd-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Orson Zhai <orsonzhai@gmail.com> 11 - Baolin Wang <baolin.wang7@gmail.com> 12 - Chunyan Zhang <zhang.lyra@gmail.com> 17 - sprd,sc9860-mailbox 18 - sprd,sc9863a-mailbox 22 - description: inbox registers' base address [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | amphion,vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ming Qian <ming.qian@nxp.com> 12 - Shijie Qin <shijie.qin@nxp.com> 14 description: |- 20 pattern: "^vpu@[0-9a-f]+$" 24 - enum: 25 - nxp,imx8qm-vpu 26 - nxp,imx8qxp-vpu [all …]
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/linux/Documentation/devicetree/bindings/dsp/ |
H A D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Daniel Baluta <daniel.baluta@nxp.com> 11 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 advanced pre- and post- audio processing. 20 - fsl,imx8qxp-dsp 21 - fsl,imx8qm-dsp 22 - fsl,imx8mp-dsp 23 - fsl,imx8ulp-dsp [all …]
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H A D | mediatek,mt8186-dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tinghan Shen <tinghan.shen@mediatek.com> 14 advanced pre- and post- audio processing. 19 - mediatek,mt8186-dsp 20 - mediatek,mt8188-dsp 24 - description: Address and size of the DSP config registers 25 - description: Address and size of the DSP SRAM [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8-ss-vpu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #address-cells = <1>; 9 #size-cells = <1>; 12 power-domains = <&pd IMX_SC_R_VPU>; 16 compatible = "fsl,imx6sx-mu"; 19 #mbox-cells = <2>; 20 power-domains = <&pd IMX_SC_R_VPU_MU_0>; 25 compatible = "fsl,imx6sx-mu"; 28 #mbox-cells = <2>; 29 power-domains = <&pd IMX_SC_R_VPU_MU_1>; [all …]
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H A D | imx8-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 lsio_bus_clk: clock-lsio-bus { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <100000000>; 14 clock-output-names = "lsio_bus_clk"; 18 compatible = "simple-bus"; [all …]
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/linux/Documentation/devicetree/bindings/arm/keystone/ |
H A D | ti,sci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI-SCI controller 10 - Nishanth Menon <nm@ti.com> 23 See https://software-dl.ti.com/tisci/esd/latest/index.html for protocol definition. 25 The TI-SCI node describes the Texas Instrument's System Controller entity node. 29 relationship between the TI-SCI parent node to the child node. 33 pattern: "^system-controller@[0-9a-f]+$" 37 - description: System controller on TI 66AK2G SoC and other K3 SoCs [all …]
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