Lines Matching +full:mbox +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/net/ti-dp83867.h>
16 compatible = "ti,j721e-sk", "ti,j721e";
29 stdout-path = "serial2:115200n8";
34 bootph-all;
40 reserved_memory: reserved-memory {
41 #address-cells = <2>;
42 #size-cells = <2>;
48 no-map;
51 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
52 compatible = "shared-dma-pool";
54 no-map;
57 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
58 compatible = "shared-dma-pool";
60 no-map;
63 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
64 compatible = "shared-dma-pool";
66 no-map;
69 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
70 compatible = "shared-dma-pool";
72 no-map;
75 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
76 compatible = "shared-dma-pool";
78 no-map;
81 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
82 compatible = "shared-dma-pool";
84 no-map;
87 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
88 compatible = "shared-dma-pool";
90 no-map;
93 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
94 compatible = "shared-dma-pool";
96 no-map;
99 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
100 compatible = "shared-dma-pool";
102 no-map;
105 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
106 compatible = "shared-dma-pool";
108 no-map;
111 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
112 compatible = "shared-dma-pool";
114 no-map;
117 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
118 compatible = "shared-dma-pool";
120 no-map;
123 c66_0_dma_memory_region: c66-dma-memory@a6000000 {
124 compatible = "shared-dma-pool";
126 no-map;
129 c66_0_memory_region: c66-memory@a6100000 {
130 compatible = "shared-dma-pool";
132 no-map;
135 c66_1_dma_memory_region: c66-dma-memory@a7000000 {
136 compatible = "shared-dma-pool";
138 no-map;
141 c66_1_memory_region: c66-memory@a7100000 {
142 compatible = "shared-dma-pool";
144 no-map;
147 c71_0_dma_memory_region: c71-dma-memory@a8000000 {
148 compatible = "shared-dma-pool";
150 no-map;
153 c71_0_memory_region: c71-memory@a8100000 {
154 compatible = "shared-dma-pool";
156 no-map;
159 rtos_ipc_memory_region: ipc-memories@aa000000 {
162 no-map;
166 vusb_main: fixedregulator-vusb-main5v0 {
168 compatible = "regulator-fixed";
169 regulator-name = "vusb-main5v0";
170 regulator-min-microvolt = <5000000>;
171 regulator-max-microvolt = <5000000>;
172 regulator-always-on;
173 regulator-boot-on;
176 vsys_3v3: fixedregulator-vsys3v3 {
178 compatible = "regulator-fixed";
179 regulator-name = "vsys_3v3";
180 regulator-min-microvolt = <3300000>;
181 regulator-max-microvolt = <3300000>;
182 vin-supply = <&vusb_main>;
183 regulator-always-on;
184 regulator-boot-on;
187 vdd_mmc1: fixedregulator-sd {
188 compatible = "regulator-fixed";
189 pinctrl-names = "default";
190 pinctrl-0 = <&vdd_mmc1_en_pins_default>;
191 regulator-name = "vdd_mmc1";
192 regulator-min-microvolt = <3300000>;
193 regulator-max-microvolt = <3300000>;
194 regulator-boot-on;
195 enable-active-high;
196 vin-supply = <&vsys_3v3>;
200 vdd_sd_dv_alt: gpio-regulator-tps659411 {
201 compatible = "regulator-gpio";
202 pinctrl-names = "default";
203 pinctrl-0 = <&vdd_sd_dv_alt_pins_default>;
204 regulator-name = "tps659411";
205 regulator-min-microvolt = <1800000>;
206 regulator-max-microvolt = <3300000>;
207 regulator-boot-on;
208 vin-supply = <&vsys_3v3>;
214 transceiver1: can-phy1 {
216 #phy-cells = <0>;
217 max-bitrate = <5000000>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
220 standby-gpios = <&wkup_gpio0 3 GPIO_ACTIVE_HIGH>;
223 transceiver2: can-phy2 {
225 #phy-cells = <0>;
226 max-bitrate = <5000000>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&main_mcan0_gpio_pins_default>;
229 standby-gpios = <&main_gpio0 65 GPIO_ACTIVE_HIGH>;
232 transceiver3: can-phy3 {
234 #phy-cells = <0>;
235 max-bitrate = <5000000>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&main_mcan5_gpio_pins_default>;
238 standby-gpios = <&main_gpio0 66 GPIO_ACTIVE_HIGH>;
241 transceiver4: can-phy4 {
243 #phy-cells = <0>;
244 max-bitrate = <5000000>;
245 pinctrl-names = "default";
246 pinctrl-0 = <&main_mcan9_gpio_pins_default>;
247 standby-gpios = <&main_gpio0 67 GPIO_ACTIVE_HIGH>;
250 dp_pwr_3v3: fixedregulator-dp-prw {
251 compatible = "regulator-fixed";
252 regulator-name = "dp-pwr";
253 regulator-min-microvolt = <3300000>;
254 regulator-max-microvolt = <3300000>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&dp_pwr_en_pins_default>;
258 enable-active-high;
262 compatible = "dp-connector";
264 type = "full-size";
265 dp-pwr-supply = <&dp_pwr_3v3>;
269 remote-endpoint = <&dp0_out>;
274 hdmi-connector {
275 compatible = "hdmi-connector";
279 pinctrl-names = "default";
280 pinctrl-0 = <&hdmi_hpd_pins_default>;
282 ddc-i2c-bus = <&main_i2c1>;
285 hpd-gpios = <&main_gpio1 0 GPIO_ACTIVE_HIGH>;
289 remote-endpoint = <&tfp410_out>;
294 dvi-bridge {
297 pinctrl-names = "default";
298 pinctrl-0 = <&hdmi_pdn_pins_default>;
300 powerdown-gpios = <&main_gpio0 127 GPIO_ACTIVE_LOW>;
304 #address-cells = <1>;
305 #size-cells = <0>;
311 remote-endpoint = <&dpi1_out>;
312 pclk-sample = <1>;
320 remote-endpoint =
327 csi_mux: mux-controller {
328 compatible = "gpio-mux";
329 #mux-state-cells = <1>;
330 mux-gpios = <&main_gpio0 88 GPIO_ACTIVE_HIGH>;
331 idle-state = <0>;
332 pinctrl-names = "default";
333 pinctrl-0 = <&main_csi_mux_sel_pins_default>;
338 main_mmc1_pins_default: main-mmc1-default-pins {
339 pinctrl-single,pins = <
351 main_uart0_pins_default: main-uart0-default-pins {
352 pinctrl-single,pins = <
360 main_uart1_pins_default: main-uart1-default-pins {
361 pinctrl-single,pins = <
367 main_i2c0_pins_default: main-i2c0-default-pins {
368 pinctrl-single,pins = <
374 main_i2c1_pins_default: main-i2c1-default-pins {
375 pinctrl-single,pins = <
381 main_i2c3_pins_default: main-i2c3-default-pins {
382 pinctrl-single,pins = <
388 main_usbss0_pins_default: main-usbss0-default-pins {
389 pinctrl-single,pins = <
395 main_usbss1_pins_default: main-usbss1-default-pins {
396 pinctrl-single,pins = <
401 main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {
402 pinctrl-single,pins = <
407 main_mcan0_pins_default: main-mcan0-default-pins {
408 pinctrl-single,pins = <
414 main_mcan0_gpio_pins_default: main-mcan0-gpio-default-pins {
415 pinctrl-single,pins = <
420 main_mcan5_pins_default: main-mcan5-default-pins {
421 pinctrl-single,pins = <
427 main_mcan5_gpio_pins_default: main-mcan5-gpio-default-pins {
428 pinctrl-single,pins = <
433 main_mcan9_pins_default: main-mcan9-default-pins {
434 pinctrl-single,pins = <
440 main_mcan9_gpio_pins_default: main-mcan9-gpio-default-pins {
441 pinctrl-single,pins = <
446 dp0_pins_default: dp0-default-pins {
447 pinctrl-single,pins = <
452 dp_pwr_en_pins_default: dp-pwr-en-default-pins {
453 pinctrl-single,pins = <
458 dss_vout0_pins_default: dss-vout0-default-pins {
459 pinctrl-single,pins = <
491 hdmi_hpd_pins_default: hdmi-hpd-default-pins {
492 pinctrl-single,pins = <
497 hdmi_pdn_pins_default: hdmi-pdn-default-pins {
498 pinctrl-single,pins = <
504 ekey_reset_pins_default: ekey-reset-pns-default-pins {
505 pinctrl-single,pins = <
510 main_i2c5_pins_default: main-i2c5-default-pins {
511 pinctrl-single,pins = <
517 rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
518 pinctrl-single,pins = <
545 rpi_header_gpio1_pins_default: rpi-header-gpio1-default-pins {
546 pinctrl-single,pins = <
553 pmic_irq_pins_default: pmic-irq-default-pins {
554 pinctrl-single,pins = <
559 mcu_cpsw_pins_default: mcu-cpsw-default-pins {
560 pinctrl-single,pins = <
576 mcu_mdio_pins_default: mcu-mdio1-default-pins {
577 pinctrl-single,pins = <
583 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
584 pinctrl-single,pins = <
599 vdd_mmc1_en_pins_default: vdd-mmc1-en-default-pins {
600 pinctrl-single,pins = <
605 vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins {
606 pinctrl-single,pins = <
611 wkup_uart0_pins_default: wkup-uart0-default-pins {
612 pinctrl-single,pins = <
618 mcu_uart0_pins_default: mcu-uart0-default-pins {
619 pinctrl-single,pins = <
627 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
628 pinctrl-single,pins = <
634 mcu_mcan0_pins_default: mcu-mcan0-default-pins {
635 pinctrl-single,pins = <
641 mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
642 pinctrl-single,pins = <
648 mkey_reset_pins_default: mkey-reset-pns-default-pins {
649 pinctrl-single,pins = <
658 pinctrl-names = "default";
659 pinctrl-0 = <&wkup_uart0_pins_default>;
664 pinctrl-names = "default";
665 pinctrl-0 = <&wkup_i2c0_pins_default>;
666 clock-frequency = <400000>;
669 /* AT24C512C-MAHM-T */
675 compatible = "ti,tps6594-q1";
677 system-power-controller;
678 pinctrl-names = "default";
679 pinctrl-0 = <&pmic_irq_pins_default>;
680 interrupt-parent = <&wkup_gpio0>;
682 gpio-controller;
683 #gpio-cells = <2>;
684 ti,primary-pmic;
685 buck123-supply = <&vsys_3v3>;
686 buck4-supply = <&vsys_3v3>;
687 buck5-supply = <&vsys_3v3>;
688 ldo1-supply = <&vsys_3v3>;
689 ldo2-supply = <&vsys_3v3>;
690 ldo3-supply = <&vsys_3v3>;
691 ldo4-supply = <&vsys_3v3>;
695 regulator-name = "vdd_cpu_avs";
696 regulator-min-microvolt = <600000>;
697 regulator-max-microvolt = <900000>;
698 regulator-boot-on;
699 regulator-always-on;
700 bootph-pre-ram;
704 regulator-name = "vdd_mcu_0v85";
705 regulator-min-microvolt = <850000>;
706 regulator-max-microvolt = <850000>;
707 regulator-boot-on;
708 regulator-always-on;
712 regulator-name = "vdd_phyio_1v8";
713 regulator-min-microvolt = <1800000>;
714 regulator-max-microvolt = <1800000>;
715 regulator-boot-on;
716 regulator-always-on;
720 regulator-name = "vdd1_lpddr4_1v8";
721 regulator-min-microvolt = <1800000>;
722 regulator-max-microvolt = <1800000>;
723 regulator-boot-on;
724 regulator-always-on;
728 regulator-name = "vdd_mcuio_1v8";
729 regulator-min-microvolt = <1800000>;
730 regulator-max-microvolt = <1800000>;
731 regulator-boot-on;
732 regulator-always-on;
736 regulator-name = "vdda_dll_0v8";
737 regulator-min-microvolt = <800000>;
738 regulator-max-microvolt = <800000>;
739 regulator-boot-on;
740 regulator-always-on;
744 regulator-name = "vda_mcu_1v8";
745 regulator-min-microvolt = <1800000>;
746 regulator-max-microvolt = <1800000>;
747 regulator-boot-on;
748 regulator-always-on;
754 compatible = "ti,tps6594-q1";
756 system-power-controller;
757 interrupt-parent = <&wkup_gpio0>;
759 gpio-controller;
760 #gpio-cells = <2>;
761 buck1234-supply = <&vsys_3v3>;
762 buck5-supply = <&vsys_3v3>;
763 ldo1-supply = <&vsys_3v3>;
764 ldo2-supply = <&vsys_3v3>;
765 ldo3-supply = <&vsys_3v3>;
766 ldo4-supply = <&vsys_3v3>;
770 regulator-name = "vdd_core_0v8";
771 regulator-min-microvolt = <800000>;
772 regulator-max-microvolt = <800000>;
773 regulator-boot-on;
774 regulator-always-on;
778 regulator-name = "vdd_ram_0v85";
779 regulator-min-microvolt = <850000>;
780 regulator-max-microvolt = <850000>;
781 regulator-boot-on;
782 regulator-always-on;
786 regulator-name = "vdd_sd_dv";
787 regulator-min-microvolt = <1800000>;
788 regulator-max-microvolt = <3300000>;
789 regulator-boot-on;
790 regulator-always-on;
794 regulator-name = "vdd_usb_3v3";
795 regulator-min-microvolt = <3300000>;
796 regulator-max-microvolt = <3300000>;
797 regulator-boot-on;
798 regulator-always-on;
802 regulator-name = "vdd_io_1v8";
803 regulator-min-microvolt = <1800000>;
804 regulator-max-microvolt = <1800000>;
805 regulator-boot-on;
806 regulator-always-on;
810 regulator-name = "vda_pll_1v8";
811 regulator-min-microvolt = <1800000>;
812 regulator-max-microvolt = <1800000>;
813 regulator-boot-on;
814 regulator-always-on;
822 pinctrl-names = "default";
823 pinctrl-0 = <&mcu_uart0_pins_default>;
828 pinctrl-names = "default";
829 pinctrl-0 = <&main_uart0_pins_default>;
831 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
836 pinctrl-names = "default";
837 pinctrl-0 = <&main_uart1_pins_default>;
843 vmmc-supply = <&vdd_mmc1>;
844 vqmmc-supply = <&vdd_sd_dv_alt>;
845 pinctrl-names = "default";
846 pinctrl-0 = <&main_mmc1_pins_default>;
847 ti,driver-strength-ohm = <50>;
848 disable-wp;
853 pinctrl-names = "default";
854 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
857 compatible = "jedec,spi-nor";
859 spi-tx-bus-width = <8>;
860 spi-rx-bus-width = <8>;
861 spi-max-frequency = <25000000>;
862 cdns,tshsl-ns = <60>;
863 cdns,tsd2d-ns = <60>;
864 cdns,tchsh-ns = <60>;
865 cdns,tslch-ns = <60>;
866 cdns,read-delay = <4>;
869 compatible = "fixed-partitions";
870 #address-cells = <1>;
871 #size-cells = <1>;
884 label = "ospi.u-boot";
918 pinctrl-names = "default";
919 pinctrl-0 = <&main_i2c0_pins_default>;
920 clock-frequency = <400000>;
922 i2c-mux@71 {
924 #address-cells = <1>;
925 #size-cells = <0>;
930 #address-cells = <1>;
931 #size-cells = <0>;
937 #address-cells = <1>;
938 #size-cells = <0>;
946 pinctrl-names = "default";
947 pinctrl-0 = <&main_i2c1_pins_default>;
949 clock-frequency = <100000>;
954 pinctrl-names = "default";
955 pinctrl-0 = <&main_i2c3_pins_default>;
956 clock-frequency = <400000>;
958 i2c-mux@70 {
960 #address-cells = <1>;
961 #size-cells = <0>;
966 #address-cells = <1>;
967 #size-cells = <0>;
973 #address-cells = <1>;
974 #size-cells = <0>;
983 pinctrl-names = "default";
984 pinctrl-0 = <&main_i2c5_pins_default>;
985 clock-frequency = <400000>;
990 pinctrl-names = "default";
991 pinctrl-0 = <&rpi_header_gpio0_pins_default>;
996 pinctrl-names = "default";
997 pinctrl-0 = <&rpi_header_gpio1_pins_default>;
1005 idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
1009 idle-states = <J721E_SERDES0_LANE0_PCIE0_LANE0>, <J721E_SERDES0_LANE1_IP4_UNUSED>,
1018 typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
1019 typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
1025 cdns,num-lanes = <2>;
1026 #phy-cells = <0>;
1027 cdns,phy-type = <PHY_TYPE_USB3>;
1036 cdns,phy-type = <PHY_TYPE_DP>;
1037 cdns,num-lanes = <4>;
1038 cdns,max-bit-rate = <5400>;
1039 #phy-cells = <0>;
1045 phy-names = "dpphy";
1046 pinctrl-names = "default";
1047 pinctrl-0 = <&dp0_pins_default>;
1051 pinctrl-names = "default";
1052 pinctrl-0 = <&main_usbss0_pins_default>;
1053 ti,vbus-divider;
1058 maximum-speed = "super-speed";
1060 phy-names = "cdns3,usb3-phy";
1066 cdns,num-lanes = <1>;
1067 #phy-cells = <0>;
1068 cdns,phy-type = <PHY_TYPE_USB3>;
1074 pinctrl-names = "default";
1075 pinctrl-0 = <&main_usbss1_pins_default>;
1076 ti,vbus-divider;
1081 maximum-speed = "super-speed";
1083 phy-names = "cdns3,usb3-phy";
1087 pinctrl-names = "default";
1088 pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
1092 phy0: ethernet-phy@0 {
1094 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
1095 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
1100 phy-mode = "rgmii-rxid";
1101 phy-handle = <&phy0>;
1105 pinctrl-names = "default";
1106 pinctrl-0 = <&dss_vout0_pins_default>;
1108 assigned-clocks = <&k3_clks 152 1>, /* VP 1 pixel clock */
1112 assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */
1119 #address-cells = <1>;
1120 #size-cells = <0>;
1126 remote-endpoint = <&dp0_in>;
1134 remote-endpoint = <&tfp410_in>;
1140 #address-cells = <1>;
1141 #size-cells = <0>;
1146 remote-endpoint = <&dpi0_out>;
1153 remote-endpoint = <&dp_connector_in>;
1161 cdns,num-lanes = <1>;
1162 #phy-cells = <0>;
1163 cdns,phy-type = <PHY_TYPE_PCIE>;
1171 cdns,num-lanes = <2>;
1172 #phy-cells = <0>;
1173 cdns,phy-type = <PHY_TYPE_PCIE>;
1180 pinctrl-names = "default";
1181 pinctrl-0 = <&ekey_reset_pins_default>;
1182 reset-gpios = <&main_gpio0 72 GPIO_ACTIVE_HIGH>;
1185 phy-names = "pcie-phy";
1186 num-lanes = <1>;
1191 pinctrl-names = "default";
1192 pinctrl-0 = <&mkey_reset_pins_default>;
1193 reset-gpios = <&wkup_gpio0 11 GPIO_ACTIVE_HIGH>;
1196 phy-names = "pcie-phy";
1197 num-lanes = <2>;
1201 pinctrl-names = "default";
1202 pinctrl-0 = <&mcu_mcan0_pins_default>;
1208 pinctrl-names = "default";
1209 pinctrl-0 = <&main_mcan0_pins_default>;
1215 pinctrl-names = "default";
1216 pinctrl-0 = <&main_mcan5_pins_default>;
1222 pinctrl-names = "default";
1223 pinctrl-0 = <&main_mcan9_pins_default>;
1236 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
1237 ti,mbox-rx = <0 0 0>;
1238 ti,mbox-tx = <1 0 0>;
1241 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
1242 ti,mbox-rx = <2 0 0>;
1243 ti,mbox-tx = <3 0 0>;
1251 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
1252 ti,mbox-rx = <0 0 0>;
1253 ti,mbox-tx = <1 0 0>;
1256 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
1257 ti,mbox-rx = <2 0 0>;
1258 ti,mbox-tx = <3 0 0>;
1266 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
1267 ti,mbox-rx = <0 0 0>;
1268 ti,mbox-tx = <1 0 0>;
1271 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
1272 ti,mbox-rx = <2 0 0>;
1273 ti,mbox-tx = <3 0 0>;
1281 mbox_c66_0: mbox-c66-0 {
1282 ti,mbox-rx = <0 0 0>;
1283 ti,mbox-tx = <1 0 0>;
1286 mbox_c66_1: mbox-c66-1 {
1287 ti,mbox-rx = <2 0 0>;
1288 ti,mbox-tx = <3 0 0>;
1296 mbox_c71_0: mbox-c71-0 {
1297 ti,mbox-rx = <0 0 0>;
1298 ti,mbox-tx = <1 0 0>;
1304 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
1310 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
1315 ti,cluster-mode = <0>;
1319 ti,cluster-mode = <0>;
1353 memory-region = <&main_r5fss0_core0_dma_memory_region>,
1359 memory-region = <&main_r5fss0_core1_dma_memory_region>,
1365 memory-region = <&main_r5fss1_core0_dma_memory_region>,
1371 memory-region = <&main_r5fss1_core1_dma_memory_region>,
1378 memory-region = <&c66_0_dma_memory_region>,
1385 memory-region = <&c66_1_dma_memory_region>,
1392 memory-region = <&c71_0_dma_memory_region>,