| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbo
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| H A D | omap-mailbox.txt | 25 routed to different processor sub-systems on DRA7xx as they are routed through
38 a SoC. The sub-mailboxes are represented as child nodes of this parent node.
41 --------------------
42 - compatible: Should be one of the following,
43 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
44 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
45 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
47 "ti,am654-mailbox" for K3 AM65x and J721E SoCs
48 "ti,am64-mailbox" for K3 AM64x SoCs
49 - reg: Contains the mailbox register address range (base
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| H A D | mtk,adsp-mbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
13 The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
21 - enum:
22 - mediatek,mt8186-adsp-mbox
23 - mediatek,mt8195-adsp-mbox
24 - items:
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| H A D | hisilicon,hi6220-mailbox.txt | 13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
28 - interrupts: Contains the interrupt information for the mailbox
33 --------------------
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
40 --------
43 compatible = "hisilicon,hi6220-mbox";
46 interrupt-parent = <&gic>;
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| H A D | altera-mailbox.txt | 5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
12 - interrupts : interrupt number. The interrupt specifier format
17 compatible = "altr,mailbox-1.0";
19 interrupt-parent = < &gic_0 >;
21 #mbox-cells = <1>;
25 compatible = "altr,mailbox-1.0";
27 interrupt-parent = < &gic_0 >;
29 #mbox-cells = <1>;
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| H A D | sti-mailbox.txt | 7 ----------
10 - compatible : Should be "st,stih407-mailbox"
11 - reg : Offset and length of the device's register set
12 - mbox-name : Name of the mailbox
13 - #mbox-cells: : Must be 2
20 - interrupts : Contains the IRQ line for a Rx mailbox
25 compatible = "st,stih407-mailbox";
28 #mbox-cells = <2>;
29 mbox-name = "a9";
33 ------
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| H A D | brcm,bcm2835-mbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/brcm,bcm2835-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stefan Wahren <stefan.wahren@i2se.com>
14 const: brcm,bcm2835-mbox
22 "#mbox-cells":
26 - compatible
27 - reg
28 - interrupts
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| H A D | qcom,cpucp-mbox.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mailbox/qcom,cpucp-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - const: qcom,x1e80100-cpucp-mbox
23 - description: CPUCP rx register region
24 - description: CPUCP tx register region
29 "#mbox-cells":
33 - compatible
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| H A D | hisilicon,hi3660-mailbox.txt | 9 ----------
12 - compatible: : Shall be "hisilicon,hi3660-mbox"
13 - reg: : Offset and length of the device's register set
14 - #mbox-cells: : Must be 3
21 - interrupts: : Contains the two IRQ lines for mailbox.
26 compatible = "hisilicon,hi3660-mbox";
30 #mbox-cells = <3>;
34 ------
37 - compatible : See the client docs
38 - mboxes : Standard property to specify a Mailbox (See ./mailbox.txt)
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| /freebsd/sys/dev/mlx5/mlx5_core/ |
| H A D | mlx5_qp.c | 1 /*-
2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved.
38 struct mlx5_qp_table *table = &dev->priv.qp_table; in mlx5_get_rsc()
41 spin_lock(&table->lock); in mlx5_get_rsc()
43 common = radix_tree_lookup(&table->tree, rsn); in mlx5_get_rsc()
45 atomic_inc(&common->refcount); in mlx5_get_rsc()
47 spin_unlock(&table->lock); in mlx5_get_rsc()
59 if (atomic_dec_and_test(&common->refcount)) in mlx5_core_put_rsc()
60 complete(&common->free); in mlx5_core_put_rsc()
71 switch (common->res) { in mlx5_rsc_event()
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am68-sk-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721s2.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
14 bootph-all;
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
27 no-map;
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| H A D | k3-am642-tqma64xxl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am642.dtsi"
18 /* 1G RAM - default variant */
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
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| H A D | k3-j721e-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
15 bootph-all;
21 reserved_memory: reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
29 no-map;
32 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
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| H A D | k3-j721s2-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
16 bootph-all;
23 reserved_memory: reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
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| H A D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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| /freebsd/contrib/dma/ |
| H A D | local.c | 2 * Copyright (c) 2008-2014, Simon Schubert <2@0x2c.org>.
63 int r = -1; in create_mbox()
79 if (maxfd == -1) in create_mbox()
85 execl(LIBEXEC_PATH "/dma-mbox-create", "dma-mbox-create", name, (char *)NULL); in create_mbox()
86 syslog(LOG_ERR, "cannot execute "LIBEXEC_PATH"/dma-mbox-create: %m"); in create_mbox()
97 if (waitchild == -1 && e == EINTR) { in create_mbox()
98 syslog(LOG_ERR, "hung child while creating mbox `%s': %m", name); in create_mbox()
102 if (waitchild == -1) { in create_mbox()
103 syslog(LOG_ERR, "child disappeared while creating mbox `%s': %m", name); in create_mbox()
108 syslog(LOG_ERR, "error creating mbox `%s'", name); in create_mbox()
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| /freebsd/contrib/ofed/opensm/opensm/ |
| H A D | osm_multicast.c | 2 * Copyright (c) 2004-2009 Voltaire, Inc. All rights reserved.
3 * Copyright (c) 2002-2015 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
60 osm_mgrp_box_t *mbox = malloc(sizeof(*mbox)); in mgrp_box_new() local
61 if (!mbox) in mgrp_box_new()
64 memset(mbox, 0, sizeof(*mbox)); in mgrp_box_new()
65 mbox->mlid = mlid; in mgrp_box_new()
66 cl_qlist_init(&mbox->mgrp_list); in mgrp_box_new()
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| /freebsd/sys/dev/cxgbe/common/ |
| H A D | common.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
67 FEC_RS = 1 << 0, /* Reed-Solomon */
68 FEC_BASER_RS = 1 << 1, /* BASE-R, aka Firecode */
139 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
140 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
141 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
142 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
143 u64 rx_trunc0; /* buffer-group 0 truncated packets */
144 u64 rx_trunc1; /* buffer-group 1 truncated packets */
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| /freebsd/usr.bin/mail/ |
| H A D | quit.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
37 * Rcv -- receive mail rationally.
50 * Otherwise, return -1 to abort command loop. in quitcmd()
54 return (-1); in quitcmd()
58 * Save all of the undetermined messages at the top of "mbox"
70 char *mbox, tempname[PATHSIZE]; in quit() local
88 * See if there any messages to save in mbox. If no, we in quit()
89 * can save copying mbox to /tmp and back. in quit()
92 * Delete all untouched messages to keep them out of mbox. in quit()
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | dra72x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
37 clock-names = "fck";
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| H A D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
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| /freebsd/usr.sbin/mfiutil/ |
| H A D | mfi_drive.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
101 len -= error; in mfi_drive_name()
107 len--; in mfi_drive_name()
109 len--; in mfi_drive_name()
112 if (pinfo->encl_device_id == 0xffff) in mfi_drive_name()
114 pinfo->slot_number); in mfi_drive_name()
115 else if (pinfo->encl_device_id == pinfo->ref.v.device_id) in mfi_drive_name()
117 pinfo->encl_index); in mfi_drive_name()
120 pinfo->encl_index, pinfo->slot_number); in mfi_drive_name()
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| H A D | mfi_flash.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
77 mbox_store_word(uint8_t *mbox, uint32_t val) in mbox_store_word() argument
80 mbox[0] = val & 0xff; in mbox_store_word()
81 mbox[1] = val >> 8 & 0xff; in mbox_store_word()
82 mbox[2] = val >> 16 & 0xff; in mbox_store_word()
83 mbox[3] = val >> 24; in mbox_store_word()
95 uint8_t mbox[4], status; in flash_adapter() local
110 fd = -1; in flash_adapter()
131 mbox_store_word(mbox, sb.st_size); in flash_adapter()
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| /freebsd/sys/dev/qlxge/ |
| H A D | qls_hw.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2014 Qlogic Corporation
96 return (ha->num_rx_rings); in qls_get_msix_count()
107 if (err || !req->newptr) in qls_syctl_mpi_dump()
125 if (err || !req->newptr) in qls_syctl_link_status()
141 dev = ha->pci_dev; in qls_hw_add_sysctls()
143 ha->num_rx_rings = MAX_RX_RINGS; ha->num_tx_rings = MAX_TX_RINGS; in qls_hw_add_sysctls()
147 OID_AUTO, "num_rx_rings", CTLFLAG_RD, &ha->num_rx_rings, in qls_hw_add_sysctls()
148 ha->num_rx_rings, "Number of Completion Queues"); in qls_hw_add_sysctls()
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| /freebsd/share/doc/usd/07.mail/ |
| H A D | mail2.nr | 43 an EOT (control\-d) at the beginning of a line, which will cause
54 abort the letter with a \s-2RUBOUT\s0. Typing a single \s-2RUBOUT\s0
59 (Interrupt -- one more to kill letter)
62 \s-2RUBOUT\s0 causes
82 <Control\-d>
99 your command. The messages are assigned numbers starting with 1 \*- you
181 You may then type in your letter in reply, followed by a <control-d>
200 will gather up your message up to a control\-d.
280 .i mbox
287 .i mbox
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