| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | allwinner,sun7i-a20-sc-nmi.yaml | 7 title: Allwinner A20 Non-Maskable Interrupt Controller
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| H A D | atmel,aic.yaml | 15 maskable, vectored interrupt controller providing handling of up to one
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| /freebsd/sys/x86/include/ |
| H A D | trap.h | 52 #define T_NMI 19 /* non-maskable trap */
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| /freebsd/usr.sbin/bhyvectl/ |
| H A D | bhyvectl.8 | 64 Inject a non-maskable interrupt (NMI) into the VM.
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| /freebsd/secure/lib/libcrypto/man/man3/ |
| H A D | SSL_poll.3 | 175 event types are defined as always being enabled (non-maskable). See "EVENT
243 Some event types are non-maskable and may be reported in \fIrevents\fR regardless
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| /freebsd/crypto/openssl/doc/man3/ |
| H A D | SSL_poll.pod | 121 event types are defined as always being enabled (non-maskable). See L</EVENT
207 Some event types are non-maskable and may be reported in I<revents> regardless
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| /freebsd/sys/arm/xilinx/ |
| H A D | zy7_gpio.c | 186 #define ZY7_GPIO_MASK_DATA_LSW(b) (0x0000+8*(b)) /* maskable wr lo */
187 #define ZY7_GPIO_MASK_DATA_MSW(b) (0x0004+8*(b)) /* maskable wr hi */
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| /freebsd/sys/amd64/vmm/ |
| H A D | vmm_lapic.c | 56 * According to section "Maskable Hardware Interrupts" in Intel SDM in lapic_set_intr()
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| /freebsd/contrib/wpa/src/utils/ |
| H A D | common.c | 77 * @maskable: Flag to indicate whether a mask is allowed
80 int hwaddr_masked_aton(const char *txt, u8 *addr, u8 *mask, u8 maskable) in hwaddr_masked_aton() argument
93 } else if (maskable && *r == '/') { in hwaddr_masked_aton()
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| H A D | common.h | 496 int hwaddr_masked_aton(const char *txt, u8 *addr, u8 *mask, u8 maskable);
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| /freebsd/sys/contrib/edk2/Include/IndustryStandard/ |
| H A D | Acpi20.h | 327 /// Non-Maskable Interrupt Source Structure
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| H A D | Acpi10.h | 585 /// Non-Maskable Interrupt Source Structure.
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| H A D | Acpi30.h | 410 /// Non-Maskable Interrupt Source Structure
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| H A D | Acpi40.h | 370 /// Non-Maskable Interrupt Source Structure
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| H A D | Acpi50.h | 506 /// Non-Maskable Interrupt Source Structure
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| H A D | Acpi51.h | 398 /// Non-Maskable Interrupt Source Structure
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| /freebsd/usr.sbin/bhyve/amd64/ |
| H A D | vmexit.c | 157 [EXIT_REASON_EXCEPTION] = "Exception or non-maskable interrupt (NMI)",
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| /freebsd/sys/i386/i386/ |
| H A D | exception.S | 205 * page faults, non-maskable interrupts, debug and breakpoint
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| H A D | trap.c | 135 [T_NMI] = { .ei = false, .msg = "non-maskable interrupt trap" },
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| /freebsd/sys/amd64/vmm/intel/ |
| H A D | vmx.c | 1567 * From the Intel SDM, Volume 3, Section "Maskable in vmx_inject_interrupts()
1569 * - maskable interrupt vectors [16,255] can be delivered in vmx_inject_interrupts()
1579 * From the Intel SDM, Volume 3, Section "Maskable in vmx_inject_interrupts()
1581 * - maskable interrupt vectors [0,255] can be delivered in vmx_inject_interrupts()
2919 * However, this must be done before maskable interrupts are enabled
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| /freebsd/sys/arm/include/ |
| H A D | armreg.h | 283 #define CPU_CONTROL_NMFI 0x08000000 /* NMFI: Non maskable FIQ */
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSystemOperands.td | 452 // Resumable Non-Maskable Interrupts(Smrnmi) CSRs
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| /freebsd/sys/amd64/amd64/ |
| H A D | trap.c | 135 [T_NMI] = "non-maskable interrupt trap",
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| H A D | fpu.c | 537 * The 6 maskable bits in order of their preference, as stated in the
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| /freebsd/sys/powerpc/include/ |
| H A D | spr.h | 719 #define MCSR_NMI 0x00100000 /* Non-maskable interrupt */
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