/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | ti-edma.txt | 3 The eDMA3 consists of two components: Channel controller (CC) and Transfer 4 Controller(s) (TC). The CC is the main entry for DMA users since it is 5 responsible for the DMA channel handling, while the TCs are responsible to 6 execute the actual DMA tansfer. 8 ------------------------------------------------------------------------------ 9 eDMA3 Channel Controller 12 -------------------- 13 - compatible: Should be: 14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP, 16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the [all …]
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H A D | ti-dma-crossbar.txt | 1 Texas Instruments DMA Crossbar (DMA request router) 4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar 5 "ti,am335x-edma-crossbar" for AM335x and AM437x 6 - reg: Memory map for accessing module 7 - #dma-cells: Should be set to match with the DMA controller's dma-cells 8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar. 9 - dma-requests: Number of DMA requests the crossbar can receive 10 - dma-masters: phandle pointing to the DMA controller 12 The DMA controller node need to have the following poroperties: 13 - dma-requests: Number of DMA requests the controller can handle [all …]
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H A D | adi,axi-dmac.txt | 1 Analog Devices AXI-DMAC DMA controller 4 - compatible: Must be "adi,axi-dmac-1.00.a". 5 - reg: Specification for the controllers memory mapped register map. 6 - interrupts: Specification for the controllers interrupt. 7 - clocks: Phandle and specifier to the controllers AXI interface clock 8 - #dma-cells: Must be 1. 10 Required sub-nodes: 11 - adi,channels: This sub-node must contain a sub-node for each DMA channel. For 12 the channel sub-nodes the following bindings apply. They must match the 15 Required properties for adi,channels sub-node: [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | mpc832x_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do 12 * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board 13 * next to the serial ports. 14 * 3) Solder a wire from U61-22 to P19K-22. 18 * you're going by the schematic, the pin is called "P19J-K22". 21 /dts-v1/; 26 #address-cells = <1>; 27 #size-cells = <1>; 38 #address-cells = <1>; [all …]
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H A D | mpc8377_wlan.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright 2007-2009 Freescale Semiconductor Inc. 9 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 27 #address-cells = <1>; 28 #size-cells = <0>; 33 d-cache-line-size = <32>; 34 i-cache-line-size = <32>; 35 d-cache-size = <32768>; [all …]
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H A D | mpc8377_rdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 12 #address-cells = <1>; 13 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; 32 d-cache-line-size = <32>; 33 i-cache-line-size = <32>; 34 d-cache-size = <32768>; 35 i-cache-size = <32768>; [all …]
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H A D | mpc8378_rdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 12 #address-cells = <1>; 13 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; 32 d-cache-line-size = <32>; 33 i-cache-line-size = <32>; 34 d-cache-size = <32768>; 35 i-cache-size = <32768>; [all …]
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H A D | mpc8315erdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 12 #address-cells = <1>; 13 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; 32 d-cache-line-size = <32>; 33 i-cache-line-size = <32>; 34 d-cache-size = <16384>; 35 i-cache-size = <16384>; [all …]
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H A D | mpc8378_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 27 #address-cells = <1>; 28 #size-cells = <0>; 33 d-cache-line-size = <32>; 34 i-cache-line-size = <32>; 35 d-cache-size = <32768>; 36 i-cache-size = <32768>; [all …]
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H A D | xpedite5200_xmon.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * xMon boot loader memory map which differs from U-Boot's. 10 /dts-v1/; 15 #address-cells = <1>; 16 #size-cells = <1>; 17 form-factor = "PMC/XMC"; 18 boot-bank = <0x0>; 33 #address-cells = <1>; 34 #size-cells = <0>; 39 d-cache-line-size = <32>; // 32 bytes [all …]
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H A D | xpedite5301.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 9 /dts-v1/; 13 #address-cells = <2>; 14 #size-cells = <2>; 15 form-factor = "PMC/XMC"; 16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ 28 #address-cells = <1>; 29 #size-cells = <0>; 34 d-cache-line-size = <32>; // 32 bytes 35 i-cache-line-size = <32>; // 32 bytes [all …]
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H A D | xpedite5370.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * XPedite5370 3U VPX single-board computer based on MPC8572E 9 /dts-v1/; 13 #address-cells = <2>; 14 #size-cells = <2>; 26 #address-cells = <1>; 27 #size-cells = <0>; 32 d-cache-line-size = <32>; // 32 bytes 33 i-cache-line-size = <32>; // 32 bytes 34 d-cache-size = <0x8000>; // L1, 32K [all …]
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H A D | mpc8377_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 27 #address-cells = <1>; 28 #size-cells = <0>; 33 d-cache-line-size = <32>; 34 i-cache-line-size = <32>; 35 d-cache-size = <32768>; 36 i-cache-size = <32768>; [all …]
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H A D | mpc834x_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; 32 d-cache-line-size = <32>; 33 i-cache-line-size = <32>; 34 d-cache-size = <32768>; 35 i-cache-size = <32768>; [all …]
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H A D | tqm8548-bigflash.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 /dts-v1/; 14 #address-cells = <1>; 15 #size-cells = <1>; 30 #address-cells = <1>; 31 #size-cells = <0>; 36 d-cache-line-size = <32>; // 32 bytes 37 i-cache-line-size = <32>; // 32 bytes 38 d-cache-size = <0x8000>; // L1, 32K 39 i-cache-size = <0x8000>; // L1, 32K [all …]
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H A D | tqm8548.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 /dts-v1/; 14 #address-cells = <1>; 15 #size-cells = <1>; 30 #address-cells = <1>; 31 #size-cells = <0>; 36 d-cache-line-size = <32>; // 32 bytes 37 i-cache-line-size = <32>; // 32 bytes 38 d-cache-size = <0x8000>; // L1, 32K 39 i-cache-size = <0x8000>; // L1, 32K [all …]
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H A D | canyonlands.dts | 4 * Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 28 #address-cells = <1>; 29 #size-cells = <0>; 35 clock-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 i-cache-line-size = <32>; [all …]
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/freebsd/sys/dts/powerpc/ |
H A D | p2020ds.dts | 7 * its contributors may be used to endorse or promote products derived 28 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 33 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * along with this program; if not, write to the Free Software 55 * MA 02110-1301, USA. 58 *------------------------------------------------------------------ 61 /dts-v1/; 65 #address-cells = <2>; 66 #size-cells = <2>; 80 #address-cells = <1>; [all …]
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H A D | mpc8572ds.dts | 4 * Copyright 2007-2009 Freescale Semiconductor Inc. All rights reserved 7 * its contributors may be used to endorse or promote products derived 28 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 33 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * along with this program; if not, write to the Free Software 55 * MA 02110-1301, USA. 58 *------------------------------------------------------------------ 61 /dts-v1/; 65 #address-cells = <2>; 66 #size-cells = <2>; [all …]
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H A D | mpc8555cds.dts | 7 * its contributors may be used to endorse or promote products derived 28 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 33 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 53 * along with this program; if not, write to the Free Software 55 * MA 02110-1301, USA. 58 *------------------------------------------------------------------ 61 /dts-v1/; 66 #address-cells = <1>; 67 #size-cells = <1>; 79 #address-cells = <1>; [all …]
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H A D | p3041si.dtsi | 4 * Copyright 2010-2011 Freescale Semiconductor Inc. 14 * names of its contributors may be used to endorse or promote products 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 35 /dts-v1/; 39 #address-cells = <2>; 40 #size-cells = <2>; 41 interrupt-parent = <&mpic>; 102 #address-cells = <1>; 103 #size-cells = <0>; [all …]
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H A D | p5020si.dtsi | 4 * Copyright 2010-2011 Freescale Semiconductor Inc. 14 * names of its contributors may be used to endorse or promote products 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 35 /dts-v1/; 39 #address-cells = <2>; 40 #size-cells = <2>; 41 interrupt-parent = <&mpic>; 108 #address-cells = <1>; 109 #size-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sa8540p-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include "sa8540p-pmics.dtsi" 17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p"; 29 stdout-path = "serial0:115200n8"; 34 regulators-0 { 35 compatible = "qcom,pm8150-rpmh-regulators"; 36 qcom,pmic-id = "a"; [all …]
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | p1022si-post.dtsi | 14 * names of its contributors may be used to endorse or promote products 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 #address-cells = <2>; 37 #size-cells = <1>; 39 * The localbus on the P1022 is not a simple-bus because of the eLBC 42 compatible = "fsl,p1022-elbc", "fsl,elbc"; 49 compatible = "fsl,mpc8548-pcie"; 51 #size-cells = <2>; 52 #address-cells = <3>; [all …]
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/freebsd/sys/dev/sound/pci/ |
H A D | envy24.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 /* -------------------------------------------------------------------- */ 39 #define PCIR_DS 0x18 /* DMA Path Registers I/O Base Address */ 40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */ 44 #define PCIM_LAC_SBDMA0 0x0000 /* SB DMA Channel Select: 0 */ 45 #define PCIM_LAC_SBDMA1 0x0040 /* SB DMA Channel Select: 1 */ 46 #define PCIM_LAC_SBDMA3 0x00c0 /* SB DMA Channel Select: 3 */ [all …]
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