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/linux/include/linux/
H A Dphylink.h24 MLO_AN_FIXED, /* Fixed-link mode */
25 MLO_AN_INBAND, /* In-band protocol */
27 /* PCS "negotiation" mode.
28 * PHYLINK_PCS_NEG_NONE - protocol has no inband capability
29 * PHYLINK_PCS_NEG_OUTBAND - some out of band or fixed link setting
30 * PHYLINK_PCS_NEG_INBAND_DISABLED - inband mode disabled, e.g.
31 * 1000base-X with autoneg off
32 * PHYLINK_PCS_NEG_INBAND_ENABLED - inban
98 phylink_autoneg_inband(unsigned int mode) phylink_autoneg_inband() argument
746 __phylink_do_bit(op,bm,mode) global() argument
749 phylink_set(bm,mode) global() argument
750 phylink_clear(bm,mode) global() argument
751 phylink_test(bm,mode) global() argument
[all...]
/linux/drivers/staging/rtl8723bs/include/
H A Drtw_cmd.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
45 u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */
47 u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */
66 u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */
75 INIT_LIST_HEAD(&pcmd->list);\
76 pcmd->cmdcode = code;\
77 pcmd->parmbuf = (u8 *)(pparm);\
78 pcmd->cmdsz = sizeof(*pparm);\
79 pcmd->rsp = NULL;\
[all …]
/linux/tools/testing/selftests/drivers/net/bonding/
H A Dbond_options.sh2 # SPDX-License-Identifier: GPL-2.0
4 # Test bonding options with mode 1,5,6
24 ip -n ${s_ns} link set eth0 type bond_slave prio 10
25 [[ $? -ne 0 ]] && skip=0
28 ip -n ${s_ns} -d link show eth0 | grep -q "prio 10"
29 [[ $? -ne 0 ]] && skip=0
39 ip -n ${s_ns} link add bond1 type bond ns_ip6_target ${g_ip6}
40 [[ $? -ne 0 ]] && skip=0
43 ip -n ${s_ns} -d link show bond1 | grep -q "ns_ip6_target ${g_ip6}"
44 [[ $? -ne 0 ]] && skip=0
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dkeystone-netcp.txt6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
[all …]
H A Dingenic,mac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ingenic,mac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MAC in Ingenic SoCs
10 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
18 - ingenic,jz4775-mac
19 - ingenic,x1000-mac
20 - ingenic,x1600-mac
21 - ingenic,x1830-mac
[all …]
H A Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
25 - st,stm32mp13-dwmac
26 - st,stm32mp25-dwmac
[all …]
H A Dcpsw.txt2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
[all …]
H A Dengleder,tsnep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TSN endpoint Ethernet MAC
10 - Gerhard Engleder <gerhard@engleder-embedded.com>
13 - $ref: ethernet-controller.yaml#
26 interrupt-names:
29 - const: mac
30 - const: txrx-1
31 - const: txrx-2
[all …]
H A Dqca,ar71xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: QCA AR71XX MAC
10 - $ref: ethernet-controller.yaml#
13 - Oleksij Rempel <o.rempel@pengutronix.de>
18 - items:
19 - enum:
20 - qca,ar7100-eth # Atheros AR7100
21 - qca,ar7240-eth # Atheros AR7240
[all …]
H A Dhisilicon-femac.txt1 Hisilicon Fast Ethernet MAC controller
4 - compatible: should contain one of the following version strings:
5 * "hisilicon,hisi-femac-v1"
6 * "hisilicon,hisi-femac-v2"
7 and the soc string "hisilicon,hi3516cv300-femac".
8 - reg: specifies base physical address(s) and size of the device registers.
9 The first region is the MAC core register base and size.
10 The second region is the global MAC control register.
11 - interrupts: should contain the MAC interrupt.
12 - clocks: A phandle to the MAC main clock.
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_fltr.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2018-2020, Intel Corporation. */
8 * ice_fltr_free_list - free filter lists helper
20 list_del(&e->list_entry); in ice_fltr_free_list()
26 * ice_fltr_add_entry_to_list - allocate and add filter entry to list
29 * @list: pointer to the list which contains MAC filters entry
39 return -ENOMEM; in ice_fltr_add_entry_to_list()
41 entry->fltr_info = *info; in ice_fltr_add_entry_to_list()
43 INIT_LIST_HEAD(&entry->list_entry); in ice_fltr_add_entry_to_list()
44 list_add(&entry->list_entry, list); in ice_fltr_add_entry_to_list()
[all …]
/linux/Documentation/networking/
H A Dsfp-phylink.rst1 .. SPDX-License-Identifier: GPL-2.0
10 phylink is a mechanism to support hot-pluggable networking modules
11 directly connected to a MAC without needing to re-initialise the
12 adapter on hot-plug events.
14 phylink supports conventional phylib-based setups, fixed link setups
23 1. PHY mode
25 In PHY mode, we use phylib to read the current link settings from
26 the PHY, and pass them to the MAC driver. We expect the MAC driver
30 2. Fixed mode
32 Fixed mode is the same as PHY mode as far as the MAC driver is
[all …]
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dhwif.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
14 int __result = -EINVAL; \
15 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) { \
16 (__priv)->hw->__module->__cname((__arg0), ##__args); \
23 int __result = -EINVAL; \
24 if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) \
25 __result = (__priv)->hw->__module->__cname((__arg0), ##__args); \
41 void (*init_rx_desc)(struct dma_desc *p, int disable_rx_ic, int mode,
44 void (*init_tx_desc)(struct dma_desc *p, int mode, int end);
47 bool csum_flag, int mode, bool tx_own, bool ls,
[all …]
H A Ddwmac1000_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
4 DWC Ether MAC 10/100/1000 Universal version 3.41a has been used for
7 This only implements the mac core functions for this chip.
9 Copyright (C) 2007-2009 STMicroelectronics Ltd
28 void __iomem *ioaddr = hw->pcsr; in dwmac1000_core_init()
30 int mtu = dev->mtu; in dwmac1000_core_init()
40 if (hw->ps) { in dwmac1000_core_init()
43 value &= ~hw->link.speed_mask; in dwmac1000_core_init()
44 switch (hw->ps) { in dwmac1000_core_init()
[all …]
H A Ddwmac100.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 MAC 10/100 Header File
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
17 /*----------------------------------------------------------------------------
18 * MAC BLOCK defines
19 *---------------------------------------------------------------------------*/
20 /* MAC CSR offset */
21 #define MAC_CONTROL 0x00000000 /* MAC Control */
22 #define MAC_ADDR_HIGH 0x00000004 /* MAC Address High */
23 #define MAC_ADDR_LOW 0x00000008 /* MAC Address Low */
[all …]
/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_config.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
30 * - used by firmware to store packets to be forwarded to other port
31 * - 8 total pools per slice
32 * - only used in switch mode (as no forwarding in mac mode)
38 * - used by firmware to store packets received from host core
39 * - 16 total pools per slice
40 * - 8 pools per port per slice and each slice handles both ports
41 * - only 4 out of 8 pools used per port (as only 4 real QoS levels in ICSSG)
42 * - switch mode: 8 total pools used
[all …]
/linux/net/core/
H A Dof_net.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/nvmem-consumer.h>
18 * of_get_phy_mode - Get phy mode for given device_node
22 * The function gets phy interface string from property 'phy-mode' or
23 * 'phy-connection-type'. The index in phy_modes table is set in
25 * PHY_INTERFACE_MODE_NA and an errno is returned, e.g. -ENODEV.
34 err = of_property_read_string(np, "phy-mode", &pm); in of_get_phy_mode()
36 err = of_property_read_string(np, "phy-connection-type", &pm); in of_get_phy_mode()
46 return -ENODEV; in of_get_phy_mode()
54 if (pp && pp->length == ETH_ALEN && is_valid_ether_addr(pp->value)) { in of_get_mac_addr()
[all …]
/linux/tools/testing/selftests/bpf/
H A Dtest_xdp_redirect_multi.sh
/linux/drivers/net/wireless/realtek/rtlwifi/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
71 if (rtlpriv->cfg->alt_fw_name) { in rtl_fw_do_work()
73 rtlpriv->cfg->alt_fw_name, in rtl_fw_do_work()
74 rtlpriv->io.dev); in rtl_fw_do_work()
76 rtlpriv->cfg->alt_fw_name); in rtl_fw_do_work()
81 rtlpriv->max_fw_size = 0; in rtl_fw_do_work()
85 if (firmware->size > rtlpriv->max_fw_size) { in rtl_fw_do_work()
91 memcpy(rtlpriv->rtlhal.pfirmware, firmware->data, in rtl_fw_do_work()
92 firmware->size); in rtl_fw_do_work()
[all …]
/linux/drivers/net/ethernet/sun/
H A Dsungem.h1 /* SPDX-License-Identifier: GPL-2.0 */
39 * This auto-clearing does not occur when the alias at GREG_STAT2
52 #define GREG_STAT_TXMAC 0x00004000 /* TX MAC signalled interrupt */
53 #define GREG_STAT_RXMAC 0x00008000 /* RX MAC signalled interrupt */
54 #define GREG_STAT_MAC 0x00010000 /* MAC Control signalled irq */
69 * signalled to the cpu. GREG_IACK can be used to clear specific top-level
130 * This 13-bit register is programmed by the driver to hold the descriptor
136 * This 13-bit register is updated by GEM to hold to descriptor entry index
146 * maximum value of 0x4ff, else one risks getting TX MAC Underrun errors.
171 * them later. -DaveM
[all …]
/linux/drivers/net/ethernet/wiznet/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 W5100 is a single chip with integrated 10/100 Ethernet MAC,
28 the MAC and PHY functions only, onchip TCP/IP is unused.
39 W5300 is a single chip with integrated 10/100 Ethernet MAC,
41 the MAC and PHY functions only, onchip TCP/IP is unused.
47 prompt "WIZnet interface mode"
52 bool "Direct address bus mode"
54 In direct address mode host system can directly access all registers
55 after mapping to Memory-Mapped I/O space.
58 bool "Indirect address bus mode"
[all …]
/linux/drivers/net/ethernet/marvell/prestera/
H A Dprestera_hw.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2019-2020 Marvell International Ltd. All rights reserved */
235 u8 mac[ETH_ALEN]; member
254 __le32 mode; member
260 } mac; member
290 u8 mac[ETH_ALEN]; member
307 __le32 mode; member
315 __le32 mode; member
322 } mac; member
325 __le32 mode; member
[all …]
/linux/Documentation/firmware-guide/acpi/dsd/
H A Dphy.rst1 .. SPDX-License-Identifier: GPL-2.0
14 for connecting PHYs on the MDIO bus [dsd-properties-rules] to the MAC layer.
17 Properties UUID For _DSD" [dsd-guide] document and the
18 daffd814-6eba-4d8c-8a91-bc9bbf4aa301 UUID must be used in the Device
21 phy-handle
22 ----------
23 For each MAC node, a device property "phy-handle" is used to reference
25 network interfaces that have PHYs connected to MAC via MDIO bus.
30 .. code-block:: none
43 Later, during the MAC driver initialization, the registered PHY devices
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-evm-quad-port-eth-exp1.dtso1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
3 * DT Overlay for CPSW9G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
4 * J784S4 EVM. The Add-On Ethernet Card has to be connected to ENET Expansion 1 slot on the
11 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
14 /dts-v1/;
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/phy/phy-cadence.h>
19 #include <dt-bindings/phy/phy.h>
21 #include "k3-pinctrl.h"
22 #include "k3-serdes.h"
[all …]
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
27 Currently, this network device driver is for all STi embedded MAC/GMAC
32 DesignWare(R) Cores Ethernet MAC 10/100/1000 Universal version 3.70a
[all …]

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