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/linux/Documentation/devicetree/bindings/net/pcs/
H A Dfsl,lynx-pcs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/pcs/fsl,lynx-pcs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Lynx PCS
10 - Ioana Ciornei <ioana.ciornei@nxp.com>
13 NXP Lynx 10G and 28G SerDes have Ethernet PCS devices which can be used as
19 const: fsl,lynx-pcs
25 - compatible
26 - reg
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1043-post.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2015-2016 Freescale Semiconductor Inc.
11 #include "qoriq-fman3-0.dtsi"
12 #include "qoriq-fman3-0-1g-0.dtsi"
13 #include "qoriq-fman3-0-1g-1.dtsi"
14 #include "qoriq-fman3-0-1g-2.dtsi"
15 #include "qoriq-fman3-0-1g-3.dtsi"
16 #include "qoriq-fman3-0-1g-4.dtsi"
17 #include "qoriq-fman3-0-1g-5.dtsi"
18 #include "qoriq-fman3-0-10g-0.dtsi"
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H A Dfsl-ls1046-post.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2015-2016 Freescale Semiconductor Inc.
12 #include "qoriq-fman3-0.dtsi"
13 #include "qoriq-fman3-0-1g-0.dtsi"
14 #include "qoriq-fman3-0-1g-1.dtsi"
15 #include "qoriq-fman3-0-1g-2.dtsi"
16 #include "qoriq-fman3-0-1g-3.dtsi"
17 #include "qoriq-fman3-0-1g-4.dtsi"
18 #include "qoriq-fman3-0-1g-5.dtsi"
19 #include "qoriq-fman3-0-10g-0.dtsi"
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H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/linux/drivers/net/pcs/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Makefile for Linux PCS drivers
4 pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-plat.o \
5 pcs-xpcs-nxp.o pcs-xpcs-wx.o
7 obj-$(CONFIG_PCS_XPCS) += pcs_xpcs.o
8 obj-$(CONFIG_PCS_LYNX) += pcs-lynx.o
9 obj-$(CONFIG_PCS_MTK_LYNXI) += pcs-mtk-lynxi.o
10 obj-$(CONFIG_PCS_RZN1_MIIC) += pcs-rzn1-miic.o
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PCS Layer Configuration
6 menu "PCS device drivers"
18 This module provides helpers to phylink for managing the Lynx PCS
25 This module provides helpers to phylink for managing the LynxI PCS
33 on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in
34 pass-through mode for MII.
/linux/include/linux/
H A Dpcs-lynx.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Lynx PCS helpers
15 void lynx_pcs_destroy(struct phylink_pcs *pcs);
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman3-0-10g-1-best-effort.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
41 fsl,fman-best-effort-port;
45 cell-index = <0x29>;
46 compatible = "fsl,fman-v3-port-tx";
48 fsl,fman-10g-port;
49 fsl,fman-best-effort-port;
53 cell-index = <1>;
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H A Dqoriq-fman3-1-10g-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x8>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
[all …]
H A Dqoriq-fman3-0-10g-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x8>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
[all …]
H A Dqoriq-fman3-0-10g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x9>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
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H A Dqoriq-fman3-1-10g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x9>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
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H A Dqoriq-fman3-1-1g-3.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xb>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2b>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <3>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
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H A Dqoriq-fman3-0-1g-3.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xb>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2b>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <3>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>;
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H A Dqoriq-fman3-1-1g-5.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xd>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2d>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <5>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>;
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H A Dqoriq-fman3-1-1g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x29>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <1>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>;
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H A Dqoriq-fman3-1-1g-2.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xa>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2a>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <2>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>;
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H A Dqoriq-fman3-0-1g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x29>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <1>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
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H A Dqoriq-fman3-0-1g-2.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xa>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2a>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <2>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>;
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H A Dqoriq-fman3-0-1g-5.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xd>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2d>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <5>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>;
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/linux/Documentation/networking/
H A Dsfp-phylink.rst1 .. SPDX-License-Identifier: GPL-2.0
10 phylink is a mechanism to support hot-pluggable networking modules
11 directly connected to a MAC without needing to re-initialise the
12 adapter on hot-plug events.
14 phylink supports conventional phylib-based setups, fixed link setups
35 3. In-band mode
37 In-band mode is used with 802.3z, SGMII and similar interface modes,
38 and we are expecting to use and honor the in-band negotiation or
43 .. code-block:: none
47 phy-mode = "sgmii";
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/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-socfpga.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Adopted from dwmac-sti.c
7 #include <linux/mfd/altera-sysmgr.h>
13 #include <linux/mdio/mdio-regmap.h>
14 #include <linux/pcs-lynx.h>
67 void __iomem *splitter_base = dwmac->splitter_base; in socfpga_dwmac_fix_mac_speed()
68 void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base; in socfpga_dwmac_fix_mac_speed()
69 struct device *dev = dwmac->dev; in socfpga_dwmac_fix_mac_speed()
71 struct phy_device *phy_dev = ndev->phydev; in socfpga_dwmac_fix_mac_speed()
105 struct device_node *np = dev->of_node; in socfpga_dwmac_parse_data()
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/linux/drivers/net/ethernet/freescale/enetc/
H A Denetc_pf.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
9 #include <linux/pcs-lynx.h>
17 u32 upper = __raw_readl(hw->port + ENETC_PSIPMAR0(si)); in enetc_pf_get_primary_mac_addr()
18 u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si)); in enetc_pf_get_primary_mac_addr()
30 __raw_writel(upper, hw->port + ENETC_PSIPMAR0(si)); in enetc_pf_set_primary_mac_addr()
31 __raw_writew(lower, hw->port + ENETC_PSIPMAR1(si)); in enetc_pf_set_primary_mac_addr()
40 static void enetc_pf_destroy_pcs(struct phylink_pcs *pcs) in enetc_pf_destroy_pcs() argument
42 lynx_pcs_destroy(pcs); in enetc_pf_destroy_pcs()
55 pf->vlan_promisc_simap |= BIT(si_idx); in enetc_enable_si_vlan_promisc()
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/linux/drivers/net/dsa/ocelot/
H A Dfelix_vsc9959.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2018-2019 NXP
15 #include <linux/pcs-lynx.h>
555 * SGMII/QSGMII MAC PCS can be found.
663 /* Layer-3 Information */
669 /* Layer-4 Information */
900 /* soft-reset the switch core */ in vsc9959_reset()
906 dev_err(ocelot->dev, "timeout: switch core reset\n"); in vsc9959_reset()
916 dev_err(ocelot->dev, "timeout: switch sram init\n"); in vsc9959_reset()
928 * Bit 7-0: Value to be multiplied with unit
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/linux/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
5 * 82562G-2 10/100 Network Connection
7 * 82562GT-2 10/100 Network Connection
9 * 82562V-2 10/100 Network Connection
10 * 82566DC-2 Gigabit Network Connection
12 * 82566DM-2 Gigabit Network Connection
19 * 82567LM-2 Gigabit Network Connection
20 * 82567LF-2 Gigabit Network Connection
21 * 82567V-2 Gigabit Network Connection
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