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Searched +full:ls1021a +full:- +full:qdma (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/dma/
H A Dfsl-qdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Layerscape SoC qDMA Controller
10 - Frank Li <Frank.Li@nxp.com>
15 - const: fsl,ls1021a-qdma
16 - items:
17 - enum:
18 - fsl,ls1028a-qdma
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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
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/linux/drivers/dma/
H A Dfsl-qdma.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright 2014-2015 Freescale
18 #include <linux/dma-mapping.h>
21 #include "virt-dma.h"
137 (((fsl_qdma_engine)->block_offset) * (x))
140 * struct fsl_qdma_format - This is the struct holding describing compound
141 * descriptor format with qDMA.
145 * 32-bits address in memory 40-bit address.
146 * @addr_hi: Same as above member, but point high 8-bits in
147 * memory 40-bit address.
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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