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Searched +full:lpc3220 +full:- +full:pwm (Results 1 – 6 of 6) sorted by relevance

/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc32xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 #include <dt-bindings/clock/lpc32xx-clock.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "nxp,lpc3220";
16 interrupt-parent = <&mic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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H A Dlpc18xx.dtsi9 * Released under the terms of 3-clause BSD License
14 #include "../../armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
31 compatible = "arm,cortex-m3";
40 compatible = "fixed-clock";
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/linux/Documentation/devicetree/bindings/pwm/
H A Dnxp,lpc3220-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/nxp,lpc3220-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC32XX PWM controller
10 - Frank Li <Frank.Li@nxp.com>
15 - nxp,lpc3220-pwm
16 - nxp,lpc3220-motor-pwm
24 '#pwm-cells':
28 - compatible
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/linux/drivers/pwm/
H A Dpwm-lpc32xx.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/pwm.h>
30 static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, in lpc32xx_pwm_config() argument
37 c = clk_get_rate(lpc32xx->clk); in lpc32xx_pwm_config()
43 return -ERANGE; in lpc32xx_pwm_config()
48 duty_cycles = div64_u64((unsigned long long)(period_ns - duty_ns) * 256, in lpc32xx_pwm_config()
55 val = readl(lpc32xx->base); in lpc32xx_pwm_config()
58 writel(val, lpc32xx->base); in lpc32xx_pwm_config()
63 static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) in lpc32xx_pwm_enable() argument
69 ret = clk_prepare_enable(lpc32xx->clk); in lpc32xx_pwm_enable()
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/linux/drivers/clk/nxp/
H A Dclk-lpc32xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/lpc32xx-clock.h>
393 regmap_read(clk_regmap, clk->reg, &val); in clk_mask_enable()
395 if (clk->busy_mask && (val & clk->busy_mask) == clk->busy) in clk_mask_enable()
396 return -EBUSY; in clk_mask_enable()
398 return regmap_update_bits(clk_regmap, clk->reg, in clk_mask_enable()
399 clk->enable_mask, clk->enable); in clk_mask_enable()
406 regmap_update_bits(clk_regmap, clk->reg, in clk_mask_disable()
407 clk->disable_mask, clk->disable); in clk_mask_disable()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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