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Searched +full:lpc1850 +full:- +full:cgu (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dnxp,lpc1850-ccu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,lpc1850-ccu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC1850 Clock Control Unit (CCU)
10 Each CGU base clock has several clock branches which can be turned on
14 Above text taken from NXP LPC1850 User Manual
17 - Frank Li <Frank.Li@nxp.com>
21 const: nxp,lpc1850-ccu
26 '#clock-cells':
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H A Dlpc1850-ccu.txt1 * NXP LPC1850 Clock Control Unit (CCU)
3 Each CGU base clock has several clock branches which can be turned on
7 - Above text taken from NXP LPC1850 User Manual.
10 Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible:
14 Should be "nxp,lpc1850-ccu"
15 - reg:
18 - #cloc
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H A Dnxp,lpc1850-cgu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,lpc1850-cgu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC1850 Clock Generation Unit (CGU)
10 The CGU generates multiple independent clocks for the core and the
16 The CGU selects the inputs to the clock generators from multiple
22 Above text taken from NXP LPC1850 User Manual.
25 - Frank Li <Frank.Li@nxp.com>
29 const: nxp,lpc1850-cgu
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H A Dlpc1850-cgu.txt1 * NXP LPC1850 Clock Generation Unit (CGU)
3 The CGU generates multiple independent clocks for the core and the
9 The CGU selects the inputs to the clock generators from multiple
15 - Above text taken from NXP LPC1850 User Manual.
19 Documentation/devicetree/bindings/clock/clock-bindings.txt
22 - compatible:
23 Should be "nxp,lpc1850-cgu"
24 - reg:
27 - #clock-cells:
28 Shall have value <1>. The permitted clock-specifier values
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/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc18xx.dtsi9 * Released under the terms of 3-clause BSD License
14 #include "../../armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cell
232 cgu: clock-controller@40050000 { global() label
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dnxp,lpc1850-wwdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/nxp,lpc1850-wwdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
14 const: nxp,lpc1850-wwdt
21 - description: Watchdog counter clock
22 - description: Register interface clock
24 clock-names:
26 - const: wdtclk
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H A Dlpc18xx-wdt.txt4 - compatible: Should be "nxp,lpc1850-wwdt"
5 - reg: Should contain WDT registers location and length
6 - clocks: Must contain an entry for each entry in clock-names.
7 - clock-names: Should contain "wdtclk" and "reg"; the watchdog counter
9 - interrupts: Should contain WDT interrupt
14 compatible = "nxp,lpc1850-wwdt";
16 clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_WWDT>;
17 clock-names = "wdtclk", "reg";
/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dnxp,lpc1850-rgu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/nxp,lpc1850-rgu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC1850 Reset Generation Unit (RGU)
10 - Frank Li <Frank.Li@nxp.com>
14 const: nxp,lpc1850-rgu
22 clock-names:
24 - const: delay
25 - const: reg
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H A Dnxp,lpc1850-rgu.txt1 NXP LPC1850 Reset Generation Unit (RGU)
8 - compatible: Should be "nxp,lpc1850-rgu"
9 - reg: register base and length
10 - clocks: phandle and clock specifier to RGU clocks
11 - clock-names: should contain "delay" and "reg"
12 - #reset-cells: should be 1
20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
56 56 ARM Cortex-M0 application core (LPC4370 only)
59 60 ADCHS (12-bit ADC) (LPC4370 only)
65 rgu: reset-controller@40053000 {
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